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PDF FDS6900S Data sheet ( Hoja de datos )
| Número de pieza | FDS6900S | |
| Descripción | Dual N-Ch PowerTrench SyncFet | |
| Fabricantes | Fairchild Semiconductor | |
| Logotipo |  |
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January 2003
FDS6900S
Dual N-Ch PowerTrench SyncFet™
General Description
The FDS6900S is designed to replace two single SO-8
MOSFETs and Schottky diode in synchronous DC:DC
power supplies that provide various peripheral voltages
for notebook computers and other battery powered
electronic devices. FDS6900S contains two unique
30V, N-channel, logic level, PowerTrench MOSFETs
designed to maximize power conversion efficiency.
The high-side switch (Q1) is designed with specific
emphasis on reducing switching losses while the low-
side switch (Q2) is optimized to reduce conduction
losses. Q2 also includes an integrated Schottky diode
using Fairchild’s monolithic SyncFET technology.
Features
• Q2: Optimized to minimize conduction losses
Includes SyncFET Schottky body diode
8.2A, 30V
RDS(on) = 22mΩ @ VGS = 10V
RDS(on) = 29mΩ @ VGS = 4.5V
• Q1: Optimized for low switching losses
Low Gate Charge ( 8 nC typical)
6.9A, 30V
RDS(on) = 30mΩ @ VGS = 10V
RDS(on) = 37mΩ @ VGS = 4.5V
SD1D2
SD1D2
SD1D2
DG1
SO-8
Pin 1 SO-
DS1DS1GS2SG2
1
2 Q1
3
Q2
4
8
7
6
5
Dual N-Channel SyncFet
Absolute Maximum Ratings TA = 25°C unless otherwise noted
Symbol
VDSS
VGSS
ID
PD
TJ, TSTG
Parameter
Drain-Source Voltage
Gate-Source Voltage
Drain Current - Continuous
- Pulsed
Power Dissipation for Dual Operation
(Note 1a)
Power Dissipation for Single Operation
(Note 1a)
(Note 1b)
(Note 1c)
Operating and Storage Junction Temperature Range
Thermal Characteristics
RθJA Thermal Resistance, Junction-to-Ambient
RθJC Thermal Resistance, Junction-to-Case
(Note 1a)
(Note 1)
Package Marking and Ordering Information
Device Marking
Device
Reel Size
FDS6900S
FDS6900S
13”
2003 Fairchild Semiconductor Corporation
Q2 Q1
30 30
±20 ±20
8.2 6.9
30 20
2
1.6
1
0.9
–55 to +150
Units
V
V
A
W
°C
78 °C/W
40 °C/W
Tape width
12mm
Quantity
2500 units
FDS6900S Rev C(W)
1 page  
Typical Characteristics: Q2
10
ID =8.2A
8
6
VDS = 10V
20V
15V
4
2
0
0 5 10 15 20 25
Qg, GATE CHARGE (nC)
Figure 7. Gate Charge Characteristics.
100
RDS(ON) LIMIT
10
1
VGS = 10V
0.1
SINGLE PULSE
RθJA = 135oC/W
TA = 25oC
1ms
10ms
100ms
1s
10s
DC
100µs
0.01
0.1
1 10
VDS, DRAIN-SOURCE VOLTAGE (V)
100
Figure 9. Maximum Safe Operating Area.
1600
1400
1200
1000
800
600
400
200
CRSS
0
0
CISS
COSS
f = 1MHz
VGS = 0 V
5 10 15 20 25
VDS, DRAIN TO SOURCE VOLTAGE (V)
30
Figure 8. Capacitance Characteristics.
50
SINGLE PULSE
40 RθJA = 135°C/W
TA = 25°C
30
20
10
0
0.001
0.01
0.1 1 10
t1, TIME (sec)
100 1000
Figure 10. Single Pulse Maximum
Power Dissipation.
FDS6900S Rev C (W)
5 Page | ||
| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet FDS6900S.PDF ] | |
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