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PDF FDH50N50 Data sheet ( Hoja de datos )

Número de pieza FDH50N50
Descripción 500V N-Channel MOSFET
Fabricantes Fairchild Semiconductor 
Logotipo Fairchild Semiconductor Logotipo



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No Preview Available ! FDH50N50 Hoja de datos, Descripción, Manual

FDH50N50 / FDA50N50
500V N-Channel MOSFET
Features
• 48A, 500V, RDS(on) = 0.105@VGS = 10 V
• Low gate charge ( typical 105 nC)
• Low Crss ( typical 45 pF)
• Fast switching
• 100% avalanche tested
• Improved dv/dt capability
UniFETTM
Description
These N-Channel enhancement mode power field effect transis-
tors are produced using Fairchild’s proprietary, planar stripe,
DMOS technology.
This advanced technology has been especially tailored to mini-
mize on-state resistance, provide superior switching perfor-
mance, and withstand high energy pulse in the avalanche and
commutation mode. These devices are well suited for high effi-
cient switched mode power supplies and active power factor
correction.
GD S
TO-247
FDH Series
G DS
TO-3P
FDA Series
D
!
"
!"
G!
"
"
!
S
Absolute Maximum Ratings
Symbol
VDSS
ID
IDM
VGSS
EAS
IAR
EAR
dv/dt
PD
TJ, TSTG
TL
Parameter
Drain-Source Voltage
Drain Current
Drain Current
- Continuous (TC = 25°C)
- Continuous (TC = 100°C)
- Pulsed
(Note 1)
Gate-Source voltage
Single Pulsed Avalanche Energy
(Note 2)
Avalanche Current
(Note 1)
Repetitive Avalanche Energy
(Note 1)
Peak Diode Recovery dv/dt
(Note 3)
Power Dissipation
(TC = 25°C)
- Derate above 25°C
Operating and Storage Temperature Range
Maximum Lead Temperature for Soldering Purpose,
1/8” from Case for 5 Seconds
FDH50N50/FDA50N50
500
48
30.8
192
±20
1868
48
62.5
4.5
625
5
-55 to +150
300
Thermal Characteristics
Symbol
RθJC
RθCS
RθJA
Parameter
Thermal Resistance, Junction-to-Case
Thermal Resistance, Case-to-Sink
Thermal Resistance, Junction-to-Ambient
Min.
--
0.24
--
Max.
0.2
--
40
Unit
V
A
A
A
V
mJ
A
mJ
V/ns
W
W/°C
°C
°C
Unit
°C/W
°C/W
°C/W
©2004 Fairchild Semiconductor Corporation
FDH50N50 / FDA50N50 Rev. A
1
www.fairchildsemi.com

1 page




FDH50N50 pdf
Typical Performance Characteristics (Continued)
Figure 13. Typical Switching Losses vs.
Gate Resistance
1,000
800
600
400
200
0
0
Eoff
Eon
Notes :
1. V = 400 V
DS
2. V = 12 V
GS
3. I = 25A
D
4. T = 125oC!
J
5 10 15 20 25 30 35 40 45 50
R,
G
Gate
resistance
[]
Figure 14. Unclamped Inductive Switching
Capability
100
Notes :
1. If R = 0
t = (L)(I )/(1.3 Rated BV - V )
AV AS
DSS DD
2. If R 0
t = (L/R)In[(I x R)/(1.3 Rated BV - V )+1]
AV AS
DSS DD
Starting T = 150oC
10 J
Starting T = 25oC
J
1
0.01 0.1 1 10
t , Time In Avalanche [ms]
AV
100
Figure 15. Transient Thermal Resistance Curve
10-1 D=0.5
0.2
0.1
0.05
10-2 0.02
0.01
single pulse
Notes :
1. Z (t) = 0.2 oC/W Max.
θJC
2. Duty Factor, D=t /t
12
3. T - T = P * Z (t)
JM C
DM θJC
10-3
10-5
10-4
10-3
10-2
10-1
100
t , Square W ave Pulse Duration [sec]
1
101
FDH50N50 / FDA50N50 Rev. A
5
www.fairchildsemi.com

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