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PDF FDH20N40 Data sheet ( Hoja de datos )

Número de pieza FDH20N40
Descripción 20A/ 400V/ 0.216 Ohm/ N-Channel SMPS Power MOSFET
Fabricantes Fairchild Semiconductor 
Logotipo Fairchild Semiconductor Logotipo



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No Preview Available ! FDH20N40 Hoja de datos, Descripción, Manual

October 2002
FDH20N40 / FDP20N40
20A, 400V, 0.216 Ohm, N-Channel SMPS Power MOSFET
Applications
Switch Mode Power Supplies(SMPS), such as
• PFC Boost
• Two-Switch Forward Converter
• Single Switch Forward Converter
• Flyback Converter
• Buck Converter
• High Speed Switching
Features
• Low Gate Charge Qg results in Simple Drive
Requirement
• Improved Gate, Avalanche and High Reapplied dv/dt
Ruggedness
• Reduced rDS(ON)
• Reduced Miller Capacitance and Low Input Capacitance
• Improved Switching Speed with Low EMI
• 175°C Rated Junction Temperature
Package
JEDEC TO-247
SOURCE
DRAIN
GATE
DRAIN
(FLANGE)
DRAIN
(FLANGE)
JEDEC TO-220AB
Symbol
SOURCE
DRAIN
GATE
D
G
S
Absolute Maximum Ratings TC = 25°C unless otherwise noted
Symbol
VDSS
VGS
ID
PD
Parameter
Drain to Source Voltage
Gate to Source Voltage
Drain Current
Continuous (TC = 25oC, VGS = 10V)
Continuous (TC = 100oC, VGS = 10V)
Pulsed (Note 1)
Power dissipation
Derate above 25oC
Ratings
400
±30
20
14
80
273
1.82
TJ, TSTG
Operating and Storage Temperature
Soldering Temperature for 10 seconds
Mounting Torque, 8-32 or M3 Screw
-55 to 175
300 (1.6mm from case)
10ibf*in (1.1N*m)
Thermal Characteristics
RθJC
RθCS
RθJA
RθJA
Thermal Resistance Junction to Case
Thermal Resistance Case to Sink, Flat, Greased Surface
Thermal Resistance Junction to Ambient (TO-247)
Thermal Resistance Junction to Ambient (TO-220)
0.55
0.24
40
62
Units
V
V
A
A
A
W
W/oC
oC
oC
oC/W
oC/W
oC/W
oC/W
©2002 Fairchild Semiconductor Corporation
FDH20N40 / FDP20N40 Rev. A,

1 page




FDH20N40 pdf
Test Circuits and Waveforms
VARY tP TO OBTAIN
REQUIRED PEAK IAS
VGS
tP
0V
RG
VDS
L
DUT
+
VDD
-
IAS
0.01
Figure 11. Unclamped Energy Test Circuit
tP
IAS
BVDSS
VDS
VDD
0
tAV
Figure 12. Unclamped Energy Waveforms
VGS
Ig(REF)
VDS
RL
DUT
+
VDD
-
Figure 13. Gate Charge Test Circuit
Qg(TOT)
VDS
VGS = 10V
VGS
VGS = 1V
0
Qg(TH)
Qgs
Ig(REF)
0
Qgd
Figure 14. Gate Charge Waveforms
VDS
RL
VGS
RGS
DUT
+
VDD
-
VGS
Figure 15. Switching Time Test Circuit
VDS
tON
td(ON)
tr
90%
tOFF
td(OFF)
tf
90%
10%
0
10%
VGS
10%
0
50%
PULSE WIDTH
90%
50%
Figure 16. Switching Time Waveform
©2002 Fairchild Semiconductor Corporation
FDH20N40 / FDP20N40 Rev. A

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