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PDF FDB603AL Data sheet ( Hoja de datos )
| Número de pieza | FDB603AL | |
| Descripción | N-Channel Logic Level Enhancement Mode Field Effect Transistor | |
| Fabricantes | Fairchild Semiconductor | |
| Logotipo |  |
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April 1998
FDP603AL / FDB603AL
N-Channel Logic Level Enhancement Mode Field Effect Transistor
General Description
These N-Channel logic level enhancement mode power field
effect transistors are produced using Fairchild's proprietary,
high cell density, DMOS technology. This very high density
process is especially tailored to minimize on-state
resistance. These devices are particularly suited for low
voltage applications such as DC/DC converters and high
efficiency switching circuits where fast switching, low in-line
power loss, and resistance to transients are needed.
Features
33
A,
30
V.
RDS(ON)
RDS(ON)
=
=
0.022
0.036
Ω
Ω
@
@
VGS=10 V
VGS=4.5 V.
Critical DC electrical parameters specified at elevated
temperature.
Rugged internal source-drain diode can eliminate the need
for an external Zener diode transient suppressor.
High density cell design for extremely low RDS(ON).
175°C maximum junction temperature rating.
_________________________________________________________________________________
D
G
S
Absolute Maximum Ratings TC = 25°C unless otherwise noted
Symbol Parameter
FDP603AL
VDSS Drain-Source Voltage
VGSS Gate-Source Voltage - Continuous
ID Drain Current - Continuous
- Pulsed
(Note 1)
PD Total Power Dissipation @ TC = 25°C
Derate above 25°C
TJ,TSTG
TL
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds
THERMAL CHARACTERISTICS
RθJC Thermal Resistance, Junction-to-Case
RθJA Thermal Resistance, Junction-to-Ambient
30
±20
33
100
50
0.33
-65 to 175
275
FDB603AL
3
62.5
© 1998 Fairchild Semiconductor Corporation
Units
V
V
A
W
W/°C
°C
°C
°C/W
°C/W
FDP603AL Rev.D
1 page | ||
| Páginas | Total 4 Páginas | |
| PDF Descargar | [ Datasheet FDB603AL.PDF ] | |
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