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PDF FM25C041U Data sheet ( Hoja de datos )
| Número de pieza | FM25C041U | |
| Descripción | 4K-Bit SPI Interface Serial CMOS EEPROM | |
| Fabricantes | Fairchild Semiconductor | |
| Logotipo |  |
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February 2002
FM25C041U
4K-Bit SPI™ Interface
Serial CMOS EEPROM
General Description
The FM25C041U is a 4K (4,096) bit serial interface CMOS
EEPROM (Electrically Erasable Programmable Read-Only
Memory). This device fully conforms to the SPI 4-wire protocol
which uses Chip Select (/CS), Clock (SCK), Data-in (SI) and Data-
out (SO) pins to synchronously control data transfer between the
SPI microcontroller and the EEPROM. In addition, the serial
interface allows a minimal pin count, packaging designed to
simplify PC board layout requirements and offers the designer a
variety of low voltage and low power options.
This SPI EEPROM family is designed to work with the 68HC11 or
any other SPI-compatible, high-speed microcontroller and offers
both hardware (/WP pin) and software ("block write") data protec-
tion. For example, entering a 2-bit code into the STATUS REGIS-
TER prevents programming in a selected block of memory and all
programming can be inhibited by connecting the /WP pin to VSS;
allowing the user to protect the entire array or a selected section.
In addition, SPI devices feature a /HOLD pin, which allows a
temporary interruption of the datastream into the EEPROM.
Fairchild EEPROMs are designed and tested for applications
requiring high endurance, high reliability, and low power con-
sumption for a continuously reliable non-volatile solution for all
markets.
Functions
I SPI MODE 1 interface
I 4,096 bits organized as 512 x 8
I Extended 2.7V to 5.5V operating voltage
I 2.1 MHz operation @ 4.5V - 5.5V
I Self-timed programming cycle
I "Programming complete" indicated by STATUS REGISTER
polling
I /WP pin and BLOCK WRITE protection
Features
I Sequential read of entire array
I 4 byte "Page write" mode to minimize total write time per
byte
I /WP pin and BLOCK WRITE protection to prevent inadvert-
ent programming as well as programming ENABLE and
DISABLE opcodes.
I /HOLD pin to suspend data transfer
I Typical 1µA standby current (ISB) for "L" devices and 0.1µA
standby current for "LZ" devices.
I Endurance: Up to 1,000,000 data changes
I Data retention greater than 40 years
Block Diagram
/CS
/HOLD
SCK
SI
Instruction
Register
Address
Counter/
Register
Decoder
Instruction
Decoder
Control Logic
and Clock
Generators
Program
Enable
VPP
High Voltage
Generator
and
Program
Timer
EEPROM Array
VCC
VSS
/WP
SPI™ is a trademark of Motorola Corporation
Read/Write Amps
Data In/Out Register
8 Bits
Non-Volatile
Status Register
Data Out
Buffer
SO
© 2002 Fairchild Semiconductor Corporation
FM25C041U Rev. B
1
www.fairchildsemi.com
1 page  
FIGURE 1. Synchronous Data Timing Diagram
CS
Mode 2
SCK
Mode 1
SI
SO
tCSS
tCLH
tCLL
tCSH
tDIS tDIH
Valid Input
tPD tDH
Valid Output
tCSI
Mode 2
Mode 1
tDF
High Z
FIGURE 2. SPI Protocol
CS
SCK
SI
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Don't Care
Mode 2
Mode 1
SO High Z Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
FIGURE 3. HOLD Timing
CS
SCK
Low state ( /CS = 0)
tHDS tHDH
Don't Care
tHDS tHDH
HOLD
SO Output (n+2)
SI Input (n+2)
Output (n+1)
tHZ
Output (n)
Input (n+1)
Input (n)
High Z
Don't Care
tLZ
tDIS
Output (n)
Input (n)
FM25C041U Rev. B
5 www.fairchildsemi.com
5 Page 
Physical Dimensions inches (millimeters) unless otherwise noted
0.114 - 0.122
(2.90 - 3.10)
85
(4.16) Typ (7.72) Typ
0.246 - 0.256
(6.25 - 6.5)
0.123 - 0.128
(3.13 - 3.30)
1
0.169 - 0.177
(4.30 - 4.50)
4
(1.78) Typ
(0.42) Typ
(0.65) Typ
Land pattern recommendation
Pin #1 IDENT
0.0433
(1.1)
Max
0.0256 (0.65)
Typ.
Note: Metal mask option for 16-byte page size.
0.002 - 0.006
(0.05 - 0.15)
See detail A
0.0035 - 0.0079
0.0075 - 0.0118
(0.19 - 0.30)
0°-8°
DETAIL A
Typ. Scale: 40X
0.020 - 0.028
(0.50 - 0.70)
Gage
plane
Seating
plane
0.0075 - 0.0098
(0.19 - 0.25)
Notes: Unless otherwise specified
1. Reference JEDEC registration MO153. Variation AA. Dated 7/93
8-Pin Molded TSSOP, JEDEC (MT8)
Package Number MTC08
Life Support Policy
Fairchild's products are not authorized for use as critical components in life support devices or systems without the express written
approval of the President of Fairchild Semiconductor Corporation. As used herein:
1. Life support devices or systems are devices or systems which,
(a) are intended for surgical implant into the body, or (b) support
or sustain life, and whose failure to perform, when properly
used in accordance with instructions for use provided in the
labeling, can be reasonably expected to result in a significant
injury to the user.
2. A critical component is any component of a life support device
or system whose failure to perform can be reasonably ex-
pected to cause the failure of the life support device or system,
or to affect its safety or effectiveness.
Fairchild Semiconductor
Americas
Customer Response Center
Tel. 1-888-522-5372
Fairchild Semiconductor
Europe
Fax: +44 (0) 1793-856858
Deutsch Tel: +49 (0) 8141-6102-0
English Tel: +44 (0) 1793-856856
Français Tel: +33 (0) 1-6930-3696
Italiano Tel: +39 (0) 2-249111-1
Fairchild Semiconductor
Hong Kong
8/F, Room 808, Empire Centre
68 Mody Road, Tsimshatsui East
Kowloon. Hong Kong
Tel; +852-2722-8338
Fax: +852-2722-8383
Fairchild Semiconductor
Japan Ltd.
4F, Natsume Bldg.
2-18-6, Yushima, Bunkyo-ku
Tokyo, 113-0034 Japan
Tel: 81-3-3818-8840
Fax: 81-3-3818-8841
FM25C041U Rev. B
11 www.fairchildsemi.com
11 Page | ||
| Páginas | Total 11 Páginas | |
| PDF Descargar | [ Datasheet FM25C041U.PDF ] | |
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