M11B416256A-35T Datasheet PDF - ETC
| Part Number | M11B416256A-35T | |
| Description | 256 K x 16 DRAM EDO PAGE MODE | |
| Manufacturers | ETC | |
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EliteMT
DRAM
M11B416256A
256 K x 16 DRAM
EDO PAGE MODE
FEATURES
X16 organization
EDO (Extended Data-Output) access mode
2 CAS Byte/Word Read/Write operation
Single 5V ( ± 10%) power supply
TTL-compatible inputs and outputs
512-cycle refresh in 8ms
Refresh modes : RAS only, CAS BEFORE RAS (CBR)
and HIDDEN
JEDEC standard pinout
Key AC Parameter
tRAC
tCAC
tRC
tPC
-25 25 8 43 10
-28 28 9 48 11
-30 30 9 55 12
-35 35 10 65 14
-40 40 11 75 16
ORDERING INFORMATION - PACKAGE
40-pin 400mil SOJ
44 / 40-pin 400mil TSOP (TypeII)
PRODUCT NO.
M11B416256A-25J
M11B416256A-28J
M11B416256A-30J
M11B416256A-35J
M11B416256A-40J
M11B416256A-25T
M11B416256A-28T
M11B416256A-30T
M11B416256A-35T
M11B416256A-40T
PACKING TYPE
SOJ
TSOPII
GENERAL DESCRIPTION
The M11B416256A is a randomly accessed solid state memory, organized as 262,144 x 16 bits device. It offers Extended
Data-Output , 5V( ± 10%) single power supply. Access time (-25,-28,-30,-35,-40) and package type (SOJ, TSOP II) are optional
features of this family. All these family have CAS - before - RAS , RAS -only refresh and Hidden refresh capabilities.
Two access modes are supported by this device : Byte access and Word access. Use only one of the two CAS and leave
the other staying high will result in a BYTE access. WORD access happens when two CAS ( CASL , CASH ) are used.
CASL transiting low during READ or WRITE cycle will output or input data into the lower byte (IO0~IO7), and CASH
transiting low will output or input data into the upper byte (IO8~15).
PIN ASSIGNMENT
SOJ Top View
TSOP (TypeII) Top View
VCC
I/O0
I/O1
I/O2
I/O3
VCC
I/O4
I/O5
I/O6
I/O7
NC
NC
WE
RAS
NC
A0
A1
A2
A3
VCC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
40 VSS
39 I/O15
38 I/O14
37 I/O13
36 I/O12
35 VSS
34 I/O11
33 I/O10
32 I/O9
31 I/O8
30 N C
29 CASL
28 CASH
27 OE
26 A8
25 A7
24 A6
23 A5
22 A4
21 VSS
VCC
I/O0
I/O1
I/O2
I/O3
VCC
I/O4
I/O5
I/O6
I/O7
NC
NC
WE
RAS
NC
A0
A1
A2
A3
VCC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
40 VSS
39 I/O15
38 I/O14
37 I/O13
36 I/O12
35 VSS
34 I/O11
33 I/O10
32 I/O9
31 I/O8
30 N C
29 CASL
28 CASH
27 OE
26 A8
25 A7
24 A6
23 A5
22 A4
21 VSS
Elite Memory Technology Inc
Publication Date : Feb. 2004
Revision : 1.9
1/15
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EliteMT
(Continued)
PARAMETER
Read Command Setup Time
Read Command Hold Time Reference to
CAS
Read Command Hold Time Reference to
RAS
CAS to Output in Low-Z
Output Buffer Turn-off Delay From CAS
or RAS
Output Buffer Turn-off to OE
Write Command Setup Time
Write Command Hold Time
Write Command Hold Time (Reference
to RAS )
Write Command Pulse Width
Write Command to RAS Lead Time
Write Command to CAS Lead Time
Data-in Setup Time
Data-in Hold Time
Data-in Hold Time (Reference to RAS )
RAS to WE Delay Time
Column Address to WE Delay Time
CAS to WE Delay Time
Transition Time (rise or fall)
Refresh Period (512 cycles)
RAS to CAS Precharge Time
CAS Setup Time(CBR REFRESH)
CAS Hold Time(CBR REFRESH)
OE Hold Time From WE During
Read-Mode-Write Cycle
OE Low to CAS High Setup Time
OE High Hold Time From CAS High
OE Precharge Time
OE Setup Prior to RAS During Hidden
Refresh Cycle
Last CAS Going Low to First CAS
Returning High
Data Output Hold After CAS Returning
Low
Output Disable Delay From WE
M11B416256A
-25 -28 -30 -35 -40 UNIT Notes
SYMBOL
MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX
tRCS
0
0
0
0
0 ns 15,18
tRCH
0
0
0
0
0 ns 9,15,19
tRRH
tCLZ
tOFF1
tOFF2
tWCS
tWCH
tWCR
tWP
tRWL
tCWL
tDS
tDH
tDHR
tRWD
tAWD
tCWD
tT
tREF
tRPC
tCSR
tCHR
tOEH
tOES
tOEHC
tOEP
tORD
0 0 0 0 0 ns 9
3 3 3 3 3 ns 20
3
15
3
15
3
15
3
15
3
15
ns
10,17,2
0
6 7 8 8 8 ns 17,26
0
0
0
0
0
ns
11,15,1
8
5 5 5 5 5 ns 15,25
22 24 26 30 34 ns 15
5 5 5 5 5 ns 15
7 7 8 9 10 ns 15
5 5 6 7 8 ns 15,19
0 0 0 0 0 ns 12,20
5 5 5 5 5 ns 12,20
22 24 26 30 34 ns
34 38 46 51 56 ns 11
21 25 31 34 36 ns 11
17 19 25 26 27 ns 11,18
1.5 50 1.5 50 1.5 50 2.5 50 2.5 50 ns
8 8 8 8 8 ms
10 10 10 10 10 ns
2,3
5 5 10 10 10 ns 1,18
7 7 10 10 10 ns 1,19
4 4 4 4 5 ns 16
4 4 4 4 5 ns
2 2 2 2 2 ns
2 2 2 2 2 ns
0 0 0 0 0 ns
tCLCH
4
5
5
5
6 ns 21
tCOH
3
3
3
3
3 ns
tWHZ 3 7 3 7 3 7 3 7 3 7 ns
Elite Memory Technology Inc
Publication Date : Feb. 2004
Revision : 1.9
5/15
Preview 5 Page |
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Featured Datasheets
| Part Number | Description | MFRS |
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| M11B416256A-35T | The function is 256 K x 16 DRAM EDO PAGE MODE. ETC | |
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