|
|
PDF DDP3310B Data sheet ( Hoja de datos )
| Número de pieza | DDP3310B | |
| Descripción | Display and Deflection Processor | |
| Fabricantes | ETC | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de DDP3310B (archivo pdf) en la parte inferior de esta página. Total 60 Páginas | ||
|
No Preview Available !
MICRONAS
ADVANCE INFORMATION
DDP 3310B
Display and Deflection
Processor
Edition July 9, 1999
6251-464-1AI
MICRONAS
1 page  
ADVANCE INFORMATION
DDP 3310B
1.2. System Architecture
The DDP 3310B is a mixed-signal IC containing the
entire digital video component processing such as
chroma transient improvement (CTI), adaptive luma
peaking, and a non-linear ‘Panorama’ aspect ratio con-
version. All deflection related signals can be adapted
to different scan rates. The analog section contains all
analog interface components and an ADC, to compen-
sate long term changes of the picture tube parameters
and extreme high-tension effects. Fig. 1–1 shows the
block diagram of the single-chip Display and Deflection
Processor.
1.3. System Application
Fig. 1–2 depicts several DDP applications. Since the
DDP functions as a video back-end, it must be comple-
mented with additional functionality to form a complete
TV set.
The VPC 32xx family processes all worldwide analog
video signals (including the European PALplus) and
allows non-linear Panorama aspect ratio conversion.
Thus, 4:3 and 16:9 systems can easily be configured
by software. The aspect ratio scaling is also used as a
sample rate converter to provide a line-locked digital
component output bus (YCrCb) compliant to ITU-R-601.
All video processing and line-locked clock/data gener-
ation is derived from a single 20.25-MHz crystal. An
optional adaptive 2H/4H comb filter (VPC 32xx) per-
forms Y/C separation for PAL and NTSC and all of their
substandards.
The VPC 32xxD and the CIP 3250A provide a high-
quality analog RGB interface with character insertion
capability. This allows appropriate processing of exter-
nal sources such as MPEG 2 set-top boxes in trans-
parent (4:2:2) quality. Furthermore, it translates RGB/
Fast-Blank signals to the common digital video bus
and makes those signals available for 100-Hz process-
ing. In some European countries (Italy), this feature is
mandatory.
The IP indicates memory-based image processing,
such as scan rate conversion, vertical processing
(Zoom), or PAL+ reconstruction.
Examples:
– Europe: 15 kHz/ 50 Hz → 32 kHz/100 Hz interlaced
– US: 15 kHz/60 Hz → 31 kHz/120 Hz non-interlaced
Note: The DDP 3310B and the VPC 32xx families
support memory-based applications through line-
locked clocks, syncs, and data. The CIP 3250A may
run either with the native DIGIT3000 clock but also
with a line-locked clock system.
CVBS
RGB
VPC 32xxD
VPC
32xx
CIP
3250A
CVBS
VPC
32xx
IP
FIFO
Fig. 1–2: DDP 3310B applications
DDP
3310B
DDP
3310B
RGB
H/V
Defl.
RGB
H/V
Defl.
✔
✔
✔
✔
✔
PAL+
100 Hz
✔✔
✔
Micronas
5
5 Page 
Y
CrCb
4:2:2/4:1:1
Line-locked
Clock
27/32 MHz
FIFO
Read Ctrl
H/V
FIFO
Write Ctrl
SDA/
SCL
5 MHz
CLK
13.5/16 MHz
27/32 MHz
40.5/40.0 MHz
digital/analog
Intpl.
4:2:2
FI-
FO
FI-
FO
Cock
Generator
Display
Frequency
Doubling
I2C
Inter-
face
Clk
Security
Scaler
1
Scaler
1
FI-
FO
FI-
FO
int. H/V
H-Drive
Gen.
Scaler
2
Scaler
2
Contrast
Y Peaking
Soft Limiter
Cr
Intpl.
CTI
4:4:4
Cb
dig. Bright.
Y digital R,G,B
RGB
Cr Matrix
Satu-
ration
Cb
White-Dr.
× BCL
Scan.
Vel. Mod.
DAC
R,G,B
Picture
Frame
Gen.
H&V
Timing
3×DAC
RGB
3×DAC
int. Bright.
×White-Drive
R,G,B
DAC DAC
cutoff black
XDFP
– H-PLL2/3, flyback control
and soft start/stop
– vertical, E/W deflection
with EHT compensation
and vertical zoom
– beam current limiter
– cutoff & drive control loop
H/V
Protection
H-Flyb.
Skew
2×DAC
V, E/W
3×DAC
ext. Bright.
×White-Drive
R,G,B
Measu-
rement
ADC
3×DAC
ext. Contr.
× White-drive
× BCL
FBL
Prio
Clamp-
ing
Clamp-
ing
SVM
RGB
out
FBL 1/2
in
RGB1
in
RGB2
in
HDrive
H/V Prot.
Fig. 2–7: Detailed block diagram of the DDP 3310B
H-Flyb
V & E/W Sense RSW1&2
11 Page | ||
| Páginas | Total 60 Páginas | |
| PDF Descargar | [ Datasheet DDP3310B.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| DDP3310B | Display and Deflection Processor | ETC |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |