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HM628512BLP-7UL fiches techniques PDF

Hitachi Semiconductor - 4 M SRAM (512-kword x 8-bit)

Numéro de référence HM628512BLP-7UL
Description 4 M SRAM (512-kword x 8-bit)
Fabricant Hitachi Semiconductor 
Logo Hitachi Semiconductor 





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HM628512BLP-7UL fiche technique
HM628512B Series
4 M SRAM (512-kword × 8-bit)
ADE-203-903D (Z)
Rev. 3.0
Aug. 24, 1999
Description
The Hitachi HM628512B is a 4-Mbit static RAM organized 512-kword × 8-bit. It realizes higher density,
higher performance and low power consumption by employing 0.35 µm Hi-CMOS process technology. The
device, packaged in a 525-mil SOP (foot print pitch width) or 400-mil TSOP TYPE II or 600-mil plastic DIP,
is available for high density mounting. The HM628512B is suitable for battery backup system.
Features
Single 5 V supply
Access time: 55/70 ns (max)
Power dissipation
Active: 50 mW/MHz (typ)
Standby: 10 µW (typ)
Completely static memory. No clock or timing strobe required
Equal access and cycle times
Common data input and output: Three state output
Directly TTL compatible: All inputs and outputs
Battery backup operation

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