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HN58C1001T-15 fiches techniques PDF

Hitachi Semiconductor - 1M EEPROM (128-kword x 8-bit) Ready/Busy and RES function

Numéro de référence HN58C1001T-15
Description 1M EEPROM (128-kword x 8-bit) Ready/Busy and RES function
Fabricant Hitachi Semiconductor 
Logo Hitachi Semiconductor 





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HN58C1001T-15 fiche technique
HN58C1001 Series
1M EEPROM (128-kword × 8-bit)
Ready/Busy and RES function
ADE-203-028G (Z)
Rev. 7.0
Oct. 31, 1997
Description
The Hitachi HN58C1001 is a electrically erasable and programmable ROM organized as 131072-word × 8-
bit. It has realized high speed, low power consumption and high reliability by employing advanced MNOS
memory technology and CMOS process and circuitry technology. It also has a 128-byte page programming
function to make the write operations faster.
Features
Single supply: 5.0 V ± 10%
Access time: 150 ns (max)
Power dissipation
Active: 20 mW/MHz, (typ)
Standby: 110 µW (max)
On-chip latches: address, data, CE, OE, WE
Automatic byte write: 10 ms (max)
Automatic page write (128 bytes): 10 ms (max)
Data polling and RDY/Busy
Data protection circuit on power on/off
Conforms to JEDEC byte-wide standard
Reliable CMOS with MNOS cell technology
104 erase/write cycles (in page mode)
10 years data retention
Software data protection
Write protection by RES pin

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