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PDF HV9906P Data sheet ( Hoja de datos )
| Número de pieza | HV9906P | |
| Descripción | Simple Off-Line/PFC & >9V DC/DC Switcher | |
| Fabricantes | Supertex Inc | |
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Hay una vista previa y un enlace de descarga de HV9906P (archivo pdf) en la parte inferior de esta página. Total 10 Páginas | ||
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HV9906
Initial Release
HV9906 FlexSwitchTM
(Simple Off-Line/PFC & >9V DC/DC Switcher)
Features
General Description
Drive one or hundreds of LEDs including White LEDs
Programmable Current Source (mA to A)
Programmable Voltage Source (Steps Up or Down)
Integrator Lock Loop Technology (IL2)
o Built in Soft Start
o Allows Discontinuous Feedback
o Eliminates Compensation Components
o Eliminates Output Averaging Filters
o Inherent Dither to Reduce EMI
Eliminates High Voltage Input Electrolytic Capacitor
Smallest and Most Reliable Off-Line Solution
Isolated or Non-Isolated Applications
Can be Operated Directly from Rectified AC Mains
10V to 400V Input Range Internal Regulator
<1.5mA Operating Supply Current
Programmable Feed Forward Regulation
Programmable Feedback Sense Threshold (mV to V)
Integrating Differential Sense Feedback
Seamlessly Change from AC to Battery Operation
Applications
LED driver
Power Factor Correction
Constant Current or Voltage Source
Battery Charger / PWM Housekeeping Supplies
Traffic Lights / Street Lights
Back Lighting of Flat Panel Displays
Advertising Signs
Automotive
The Supertex HV9906 allows the development of the smallest
possible, most reliable, offline and wide DC/DC conversion range
converters for driving LEDs and other applications. The HV9906
combines internally all the components required to operate directly
from the rectified AC line with a feedback mechanism that
eliminates filters & compensation components, and which can
close the loop with feedback from a discontinuous waveform (eg.
LED current).
The HV9906 is capable of driving multiconverters, which have
been shown to provide the best performance to component count
trade off for wide conversion range applications like offline
converters. Applicable multiconverters include bucking & boosting
topologies, in isolated & non-isolated configurations, as well as
power factor correcting topologies from <1W up to 150W.
Proper choice of external components will allow the programming
of currents from <1mA to several amps and will allow stepping up
or stepping down from the input without the need to change
components. For example, the same HV9906 converter nominally
regulating to 60VDC output may operate from 12VDC, or from
rectified AC input to 265VRMS.
The HV9906 utilizes a programmable inversely proportional fast
feed forward algorithm to calculate output on time and a novel
Integrating Lock Loop (IL2) feedback with programmable threshold
differential sensing. The sensed feedback may be positive or
negative with respect to ground and the signal may be
discontinuous. In some topologies this control method permits the
elimination of the bulky input filter capacitor (a small high voltage
ceramic or film capacitor is required to maintain a high frequency
path). This algorithm when used with certain multiconverters such
as the flyback-buck, with a fixed load, results in near constant
frequency with only a small dither which helps meet FCC
requirements.
Typical Application Circuit
12VDC to 400VDC
or
65VAC to 280VAC
1N4007
D1 D2
D5
MURS160
D6
MURS160
L2
15uH
D4 D3
C1
0.047uF
400V
R1
8M
R2
100k
C2
1uF
to
6.8uF
C3
0.033uF
L1
56uH
D7
MURS160
C4
Optional
U1
+Vin GATE
Von NS
HV9906
Vdd PS
AGND PGND
M1
IRFBC30AF
R3
900k
R4
300k
NPN Bipolar Transistor Array or Matched 2N2222
Q1 Q2
Q3
Q25
Negative Voltage
-
+
LED-1
Row 1
LED-1
Row 2
LED-1
Row 3
LED-1
Row 25
20mA
20mA
20mA
20mA
LED-9
Row 1
LED-9
Row 2
LED-9
Row 3
LED-9
Row 25
R5
LED-10
LED-10
LED-10
100
Row 2
Row 3
Row 25
1 07/23/02
Supertex, Inc. 1235 Bordeaux Drive, Sunnyvale, CA 94089 TEL: (408) 744-0100 FAX: (408) 222-4895 www.supertex.com
1 page  
Functional Description - continued
The voltage difference between the sensed nodes will require the
selection of resistor values in series with the NS and PS pins that
will result in current balance. While balance can be achieved even
if neither sensed node is at ground potential, care must be taken to
assure that the dynamic voltage excursions of the sensed node
within the design operating range (i.e. 50KHz to 250KHz) of the
particular application does not result in common mode current
swings in the PS and NS pins that would result in saturation of the
integrators. Saturation at frequencies below the minimum
operating frequency of the application is permitted* since by design
the circuit will soft start from its lowest frequency.
To regulate on a sense node voltage of +0.5V with respect to
ground connect a 200kΩ resistor from the NS pin to the ground
end of the sense element and a 100kΩ resistor from the PS pin to
the +0.5V end of the sense element. Since the voltage drop on the
200kΩ resistor connected to the NS pin is 1V, a reference current
of 5µA is established. To achieve current balance in the PS pin
the sensed node must rise to +0.5V.
For regulating a sense node voltage of –1V with respect to ground
connect a 200kΩ resistor from the PS pin to the ground end of the
sense element and a 400kΩ resistor from the NS pin to the –1V
end of the sense element. Since the voltage drop on the 200kΩ
resistor connected to the PS pin is 1V, a reference current of 5µA
is established. To achieve current balance in the NS pin the
sensed node must fall to -1V.
For calculating the required resistor values refer to “Programming
the Sense Inputs” in the Design Information section.
Integrator
The differential output current of the differential sense circuit is fed
to two matched internal 20pF capacitors that make up the
differential integrator circuit. The tolerances of these integrated
capacitors are typically ±5%, however, since they are matched,
their absolute values only affect the peak voltage of the integrators.
Operating at the lowest frequency results in the highest peak
voltage on the integrators, which will saturate if the peak voltage
on the capacitors exceeds 6V, resulting in a loss of regulation.
This must be taken into consideration when deciding on the value
of the sense currents in the PS and NS pins. The signals at the
sensed nodes may be discontinuous (i.e. controlling the average
output current into LEDs) since the signals are cycle-averaged by
the differential integrator. The differential output of the integrator is
fed to the sample and hold comparators.
*The circuit soft starts from the lowest frequency, therefore it is
very likely that the integrators will saturate during startup. By
design the VCO frequency will be incremented in the event of a
saturated condition, thereby guaranteeing that the circuit will start.
HV9906
Sample and Hold VCO Control
The cycle-averaged outputs of the differential integrator are
compared by the window comparator of the sample and hold
circuit. If the differential integrator outputs are unequal the sample
and hold circuit increments or decrements the VCO control voltage
by a fixed small step resulting in a shorter or longer subsequent
VCO cycle and thus an increased or decreased frequency. When
the cycle-averaged signals from the differential integrator are
nearly equal (within the hysteresis band of the comparators) the
sample and hold function is halted and the off time is unchanged.
Since the frequency is incremented or decremented in small fixed
steps at the end of each cycle the rate of frequency increase or
decrease is a function of the frequency and thus the oscillator
frequency will change exponentially.
In this manner the Integrator Lock Loop (IL2) feedback controls the
oscillator frequency based on a cycle-averaged sensed value to
maintain output regulation. For certain off-line topologies, the
result is near fixed frequency operation for a fixed load with a
dither of a few KHz which helps in meeting FCC conducted
emission requirements.
Gate Driver
The gate driver buffers the output of the VCO and provides
sufficient gate drive power to achieve rise and fall times below
75nS into a 750pF equivalent MOSFET gate. The under voltage
lockout (UVLO) assures that sufficient voltage is available to drive
the gate of standard or logic level threshold MOSFETs.
Soft Start
On initial power application the UVLO and POR resets the output
latch and sets the VCO to its lowest frequency state, which
represents minimum power transfer per VCO cycle. Thereafter,
the differential sense feedback loop increments the frequency in
small steps, increasing the power transfer rate until output
regulation is achieved, thereby providing the required soft start
function.
5 07/23/02
Supertex, Inc. 1235 Bordeaux Drive, Sunnyvale, CA 94089 TEL: (408) 744-0100 FAX: (408) 222-4895 www.supertex.com
5 Page | ||
| Páginas | Total 10 Páginas | |
| PDF Descargar | [ Datasheet HV9906P.PDF ] | |
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