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PDF HV7131B Data sheet ( Hoja de datos )
| Número de pieza | HV7131B | |
| Descripción | CMOS IMAGE SENSOR With 8-bit ADC | |
| Fabricantes | ETC | |
| Logotipo |  |
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Electronics Industries Co., Ltd.
System IC Division
DESCRIPTION
PRELIMINARY
HV7131B
CMOS IMAGE SENSOR
With 8-bit ADC
HV7131B is a highly integrated single chip CMOS color image sensor using Hyundai 0.5um CMOS process
developed for image application to realize high efficiency R/G/B photo sensor. The sensor has 648X488 pixel
array, and in general color interpolation method using 3x3 spatial mask with window size 642X482 pixels may
be used for VGA(640X480) display mode. Each compact active pixel element has high photo-sensitivity and
converts photon energy to analog voltage signal. The sensor has three on-chip 8 bit Digital to Analog Convert
(DAC) and 648 comparators to digitize the pixel output. The three on-chip 8 bit DAC can be used for
independent R/G/B gain control. Hyundai proprietary on-chip Correlated Double Sampling (CDS) circuit can
reduce Fixed Pattern Noise (FPN) dramatically. The whole 8 bit digital color raw data is directly available on
the package pins and just a few control signals are needed for whole chip control so that it is very easy to
configure CMOS imaging system.
FEATURES
l 648 x 488 pixels resolution
l
l Active pixel size: 8um x 8um
l
l High efficiency R/G/B color photo sensors
l
l Integrated 8-bit ADC for direct digital output
l
l Low power 3.3V operation (5V tolerant I/O)
l
l Integrated pan control and window sizing
l
l Clock speed up to 15MHz
l
l Programmable frame rate and synchronous format l
Full function control through standard I2C bus
Built-in Automatic Gain Control AGC
48Pin CLCC / 20Pin CDIP
Bayer RGB color pattern
Anti-blooming circuit
Flexible exposure time control
Integrated on-chip timing and drive control
1/3" optical format
TECHNICAL SPECIFICATION
FUNCTIONAL BLOCK DIAGRAM
Pixel resolution
Pixel size
Fill factor
Format
Sensitivity
Supply voltage for analog
Supply voltage for digital
Supply voltage for 5V tolerant input
Power Consumption
Operating temperature
Technology
648x488
8x8um2
30%
VGA
2.2V/lux·sec
3.3V
3.3V
5.0V
@15MHz
0~40 Centigrade
0.5um 3metal CMOS
I2C
Pixel Array
ADC Block
Line Buffer
This document is a general product description and is subject to change without notice. Hyundai Electronics does not assume any
responsibility for use of circuits described. NO patent licenses are implied.
DA31991011R_1.0
- 1 - 1999 Hyundai System IC Division
1 page  
Electronics Industries Co., Ltd.
System IC Division
PRELIMINARY
INPUT / OUTPUT AC CHARACTERISTICS (Continue)
ENB Timing
T4
MCLK
ENB
T5
T6
T
T4 : ENB Setup Time : 5[ns]
T5 : ENB Hold Time : 5[ns]
T6 : ENB Valid Time : minimum 2 Clock
RESET Timing
Must in Valid(active low) state at least 8 MCLK periods
HV7131B
CMOS IMAGE SENSOR
With 8-bit ADC
This document is a general product description and is subject to change without notice. Hyundai Electronics does not assume any
responsibility for use of circuits described. NO patent licenses are implied.
DA31991011R_1.0
- 5 - 1999 Hyundai System IC Division
5 Page 
Electronics Industries Co., Ltd.
System IC Division
REGISTER DESCRIPTION
PRELIMINARY
HV7131B
CMOS IMAGE SENSOR
With 8-bit ADC
MODE_A[8’h00]
Represent device identity. High nibble: Sensor Array Size, Low Nibble: Revision Number
For HV7131B, identity value is 8’ h00, [VGA: 0, Revision 0]
MODE_B[8’h01]
This is operating mode select register. Each bit's description is as below.
Bit Function
Description
Selects integration time unit between line unit and pixel unit. Commonly
line unit is used for its large step control, but under high luminance or when
0 Integration time unit precise control is needed in the case such as anti-flicker, pixel unit control
is used.
Default is line unit mode[0].
Selects continuous frame output and single frame output. When single shot
1
Single Frame mode
mode is selected, only one frame data is produced and the sensor goes to
idle mode.
Default is continuous frame output mode[0].
Selects imaging array size between programmable window size and full
2
Window Mode
size [648x488]. Default is window size mode[1] and current window default
size is 641x482. [Window size is determined by RowStartAddress, Column
StartAddress, WindowWidth, WindowHeight Registers.]
Selects HSYNC output mode between “ data valid mode” and “ data valid
3 HSYNC output mode with clock mode”.
Default is data valid mode[0].
Selects output data type among (data – reference), data only or reference
only. Internally the sensor produces reference data and image data
4,5
Output data type
respectively, and image data is deducted by reference data in order to
reduce Fixed Pattern Noise. Generally the technique is called Correlated
Double Sampling(CDS).
Default is data - reference (CDS) [00].
Selects sensor operation mode among normal sensing mode and chip test
6,7 Operation Mode related modes. In normal use, the mode should be set to normal mode[00].
Default is normal operation mode[00].
This document is a general product description and is subject to change without notice. Hyundai Electronics does not assume any
responsibility for use of circuits described. NO patent licenses are implied.
DA31991011R_1.0
- 11 -
1999 Hyundai System IC Division
11 Page | ||
| Páginas | Total 29 Páginas | |
| PDF Descargar | [ Datasheet HV7131B.PDF ] | |
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