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PDF HUF76423S3S Data sheet ( Hoja de datos )
| Número de pieza | HUF76423S3S | |
| Descripción | 33A/ 60V/ 0.035 Ohm/ N-Channel/ Logic Level UltraFET Power MOSFET | |
| Fabricantes | Intersil Corporation | |
| Logotipo |  |
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Data Sheet
HUF76432P3, HUF76432S3S
December 1999 File Number 4673.3
55A, 60V, 0.019 Ohm, N-Channel, Logic
Level UltraFET Power MOSFET
Packaging
JEDEC TO-220AB
JEDEC TO-263AB
SOURCE
DRAIN
GATE
DRAIN
(FLANGE)
DRAIN
(FLANGE)
HUF76432P3
Symbol
GATE
SOURCE
HUF76432S3S
D
G
S
Features
• Ultra Low On-Resistance
- rDS(ON) = 0.017Ω, VGS = 10V
- rDS(ON) = 0.019Ω, VGS = 5V
• Simulation Models
- Temperature Compensated PSPICE® and SABER™
Electrical Models
- Spice and SABER Thermal Impedance Models
- www.Intersil.com
• Peak Current vs Pulse Width Curve
• UIS Rating Curve
• Switching Time vs RGS Curves
Ordering Information
PART NUMBER
PACKAGE
BRAND
HUF76432P3
TO-220AB
76432P
HUF76432S3S
TO-263AB
76432S
NOTE: When ordering, use the entire part number. Add the suffix T
to obtain the variant in tape and reel, e.g., HUF76432S3ST.
Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified
HUF76432P3, HUF76432S3S UNITS
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDSS
Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS
Drain Current
Continuous (TC= 25oC, VGS = 5V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID
Continuous
Continuous
Continuous
(TC=
(TC=
(TC=
211500o00CooCC, V,, VVGGGSSS===1054VV.5))V().F.(igF.ui.gr.ue.r2e. ).2..)
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ID
ID
ID
Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .IDM
Pulsed Avalanche Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .UIS
60
60
±16
55
59
39
37
Figure 4
Figures 6, 17, 18
V
V
V
A
A
A
A
Power Dissipation . . .
Derate Above 25oC
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PD
...
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .TL
Package Body for 10s, See Techbrief TB334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg
NOTES:
1. TJ = 25oC to 150oC.
130
0.87
-55 to 175
300
260
W
mW/oC
oC
oC
oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
6-1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
UltraFET™ is a trademark of Intersil Corporation. PSPICE® is a registered trademark of MicroSim Corporation.
SABER™ is a trademark of Analogy, Inc. 1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999.
1 page  
HUF76432P3, HUF76432S3S
Typical Performance Curves (Continued)
1.2
VGS = VDS, ID = 250µA
1.0
0.8
1.2
ID = 250µA
1.1
1.0
0.6
0.4
-80
-40 0 40 80 120 160
TJ, JUNCTION TEMPERATURE (oC)
200
FIGURE 11. NORMALIZED GATE THRESHOLD VOLTAGE vs
JUNCTION TEMPERATURE
4000
CISS = CGS + CGD
1000
COSS ≅ CDS + CGD
100
VGS = 0V, f = 1MHz
30
0.1
1.0
CRSS = CGD
10
VDS, DRAIN TO SOURCE VOLTAGE (V)
60
FIGURE 13. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
750
VGS = 4.5V, VDD = 30V, ID = 37A
0.9
-80
-40 0 40 80 120 160
TJ, JUNCTION TEMPERATURE (oC)
200
FIGURE 12. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE
10
VDD = 30V
8
6
4
WAVEFORMS IN
DESCENDING ORDER:
2 ID = 55A
ID = 37A
ID = 18A
0
0 10 20 30 40 50
Qg, GATE CHARGE (nC)
NOTE: Refer to Intersil Application Notes AN7254 and AN7260.
FIGURE 14. GATE CHARGE WAVEFORMS FOR CONSTANT
GATE CURRENT
300
VGS = 10V, VDD = 30V, ID = 59A
500
tr
250
tf
td(OFF)
td(ON)
0
0 10 20 30 40 50
RGS, GATE TO SOURCE RESISTANCE (Ω)
FIGURE 15. SWITCHING TIME vs GATE RESISTANCE
200
tf
tr
100
0
0
td(OFF)
td(ON)
10 20 30 40
RGS, GATE TO SOURCE RESISTANCE (Ω)
50
FIGURE 16. SWITCHING TIME vs GATE RESISTANCE
6-5
5 Page | ||
| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet HUF76423S3S.PDF ] | |
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