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Número de pieza | HUF76423D3S | |
Descripción | 20A/ 60V/ 0.037 Ohm/ N-Channel/ Logic Level UltraFET Power MOSFETFairchild | |
Fabricantes | Fairchild Semiconductor | |
Logotipo | ||
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No Preview Available ! Data Sheet
HUF76429D3, HUF76429D3S
October 1999 File Number 4671.1
20A, 60V, 0.027 Ohm, N-Channel, Logic
Level UltraFET Power MOSFET
Packaging
JEDEC TO-251AA
JEDEC TO-252AA
SOURCE
DRAIN
GATE
DRAIN
(FLANGE)
DRAIN
(FLANGE)
HUF76429D3
GATE
SOURCE
HUF76429D3S
Symbol
D
G
S
Features
• Ultra Low On-Resistance
- rDS(ON) = 0.023Ω, VGS = 10V
- rDS(ON) = 0.027Ω, VGS = 5V
• Simulation Models
- Temperature Compensated PSPICE® and SABER©
Electriecal Models
- Spice and SABER Thermal Impedance Models
- www.semi.Intersil.com
• Peak Current vs Pulse Width Curve
• UIS Rating Curve
• Switching Time vs RGS Curves
Ordering Information
PART NUMBER
PACKAGE
BRAND
HUF76429D3
TO-251AA
76429D
HUF76429D3S
TO-252AA
76429D
NOTE: When ordering, use the entire part number. Add the suffix T
to obtain the variant in tape and reel, e.g., HUF76429D3ST.
Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified
HUF76429D3, HUF76429D3S UNITS
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDSS
Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS
Drain Current
Continuous (TC= 25oC, VGS = 5V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID
Continuous
Continuous
Continuous
(TC=
(TC=
(TC=
211500o00CooCC, V,, VVGGGSSS===1054VV.5))V().F.(igF.ui.gr.ue.r2e. ).2..)
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ID
ID
ID
Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .IDM
Pulsed Avalanche Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .UIS
60
60
±16
20
20
20
20
Figure 4
Figures 6, 17, 18
V
V
V
A
A
A
A
Power Dissipation . . .
Derate Above 25oC
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PD
...
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .TL
Package Body for 10s, See Techbrief TB334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg
NOTES:
1. TJ = 25oC to 150oC.
110
0.74
-55 to 175
300
260
W
W/oC
oC
oC
oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
1 CAUTION: These devices are sensitive to electrostatic discharge. Follow proper ESD Handling Procedures.
UltraFET™ is a trademark of Intersil Corporation. PSPICE® is a registered trademark of MicroSim Corporation.
SABER© is a Copyright of Analogy Inc. 1-888-INTERSIL or 407-727-9207 | Copyright © Intersil Corporation 1999.
1 page HUF76429D3, HUF76429D3S
Typical Performance Curves (Continued)
1.2 1.2
VGS = VDS, ID = 250µA
ID = 250µA
1.0
1.1
0.8
1.0
0.6
0.4
-80
-40 0 40 80 120 160
TJ, JUNCTION TEMPERATURE (oC)
200
FIGURE 11. NORMALIZED GATE THRESHOLD VOLTAGE vs
JUNCTION TEMPERATURE
3000
1000
VGS = 0V, f = 1MHz
CISS = CGS + CGD
COSS ≅ CDS + CGD
100
CRSS = CGD
30
0.1
1.0 10
VDS, DRAIN TO SOURCE VOLTAGE (V)
60
FIGURE 13. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
0.9
-80
-40 0 40 80 120 160
TJ, JUNCTION TEMPERATURE (oC)
200
FIGURE 12. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE
10
VDD = 30V
8
6
4
WAVEFORMS IN
DESCENDING ORDER:
2 ID = 20A
ID = 10A
0
0 5 10 15 20 25 30 35 40
Qg, GATE CHARGE (nC)
NOTE: Refer to Intersil Application Notes AN7254 and AN7260.
FIGURE 14. GATE CHARGE WAVEFORMS FOR CONSTANT
GATE CURRENT
400
VGS = 4.5V, VDD = 30V, ID = 20A
300
tr
200
tf td(OFF)
100
td(ON)
0
0 10 20 30 40 50
RGS, GATE TO SOURCE RESISTANCE (Ω)
FIGURE 15. SWITCHING TIME vs GATE RESISTANCE
300
VGS = 10V, VDD = 30V, ID = 20A
250
200
td(OFF)
tf
150
100
50
0
0
tr
td(ON)
10 20 30 40
RGS, GATE TO SOURCE RESISTANCE (Ω)
50
FIGURE 16. SWITCHING TIME vs GATE RESISTANCE
5
5 Page |
Páginas | Total 9 Páginas | |
PDF Descargar | [ Datasheet HUF76423D3S.PDF ] |
Número de pieza | Descripción | Fabricantes |
HUF76423D3 | 20A/ 60V/ 0.037 Ohm/ N-Channel/ Logic Level UltraFET Power MOSFETFairchild | Fairchild Semiconductor |
HUF76423D3 | 20A/ 60V/ 0.037 Ohm/ N-Channel/ Logic Level UltraFET Power MOSFET | Intersil Corporation |
HUF76423D3S | 20A/ 60V/ 0.037 Ohm/ N-Channel/ Logic Level UltraFET Power MOSFETFairchild | Fairchild Semiconductor |
HUF76423D3S | 20A/ 60V/ 0.037 Ohm/ N-Channel/ Logic Level UltraFET Power MOSFET | Intersil Corporation |
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