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Número de pieza | HUF76407DK8 | |
Descripción | 3.5A/ 60V/ 0.105 Ohm/ Dual N-Channel/ Logic Level UltraFET Power MOSFET | |
Fabricantes | Intersil Corporation | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de HUF76407DK8 (archivo pdf) en la parte inferior de esta página. Total 12 Páginas | ||
No Preview Available ! Data Sheet
HUF76407DK8
October 1999 File Number 4712.4
3.5A, 60V, 0.105 Ohm, Dual N-Channel,
Logic Level UltraFET Power MOSFET
Packaging
JEDEC MS-012AA
BRANDING DASH
1
2
3
4
5
Symbol
SOURCE1 (1)
GATE1 (2)
SOURCE2 (3)
GATE2 (4)
DRAIN 1 (8)
DRAIN 1 (7)
DRAIN 2 (6)
DRAIN 2 (5)
Features
• Ultra Low On-Resistance
- rDS(ON) = 0.090Ω, VGS = 10V
- rDS(ON) = 0.105Ω, VGS = 5V
• Simulation Models
- Temperature Compensated PSPICE® and SABER©
Electrical Models
- Spice and SABER Thermal Impedance Models
- www.semi.Intersil.com
• Peak Current vs Pulse Width Curve
• UIS Rating Curve
• Transient Thermal Impedance Curve vs Board Mounting
Area
• Switching Time vs RGS Curves
Ordering Information
PART NUMBER
PACKAGE
BRAND
HUF76407DK8
MS-012AA
76407DK8
NOTE: When ordering, use the entire part number. Add the suffix T
to obtain the variant in tape and reel, e.g., HUF76407DK8T.
Absolute Maximum Ratings TA = 25oC, Unless Otherwise Specified
HUF76407DK8
UNITS
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDSS
Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS
Drain Current
Continuous
Continuous
Continuous
(TA=
(TA=
(TA=
221550oo0CCoC,, VV, VGGGSSS===51V05VV) ))(N((FNoitogetue2re)3.)2..)..(..N..o..te.. ..2..)..
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ID
ID
ID
Continuous (TA= 100oC, VGS = 4.5V) (Figure 2) (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . ID
Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .IDM
Pulsed Avalanche Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .UIS
60
60
±16
3.5
3.8
1.0
1.0
Figure 4
Figures 6, 17, 18
V
V
V
A
A
A
A
Power Dissipation (Note 2)
Derate Above 25oC . . . .
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PD
...
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .TL
Package Body for 10s, See Techbrief TB334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg
NOTES:
1. TJ = 25oC to 125oC.
2. 50oC/W measured using FR-4 board with 0.76 in2 (490.3 mm2) copper pad at 1 second.
3. 228oC/W measured using FR-4 board with 0.006 in2 (3.87 mm2) copper pad at 1000 seconds.
2.5
20
-55 to 150
300
260
W
mW/oC
oC
oC
oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
UltraFET™ is a trademark of Intersil Corporation. PSPICE® is a registered trademark of MicroSim Corporation.
SABER is a Copyright of Analogy, Inc. http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
1 page HUF76407DK8
Typical Performance Curves (Continued)
1.2 1.2
VGS = VDS, ID = 250µA
ID = 250µA
1.0 1.1
0.8 1.0
0.6
-80
-40 0
40 80 120
TJ, JUNCTION TEMPERATURE (oC)
160
FIGURE 11. NORMALIZED GATE THRESHOLD VOLTAGE vs
JUNCTION TEMPERATURE
1000
CISS = CGS + CGD
100
COSS ≅ CDS + CGD
10
VGS = 0V, f = 1MHz
5
0.1 1.0
CRSS = CGD
10
VDS, DRAIN TO SOURCE VOLTAGE (V)
60
FIGURE 13. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
50
VGS = 4.5V, VDD = 30V, ID = 1.0A
40
30 td(OFF)
20
td(ON)
10
tr
tf
0
0 10 20 30 40 50
RGS, GATE TO SOURCE RESISTANCE (Ω)
FIGURE 15. SWITCHING TIME vs GATE RESISTANCE
5
0.9
-80
-40 0 40 80 120
TJ, JUNCTION TEMPERATURE (oC)
160
FIGURE 12. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE
10
VDD = 30V
8
6
4
WAVEFORMS IN
2 DESCENDING ORDER:
ID = 3.8A
ID = 1.0A
0
0 2 4 6 8 10
Qg, GATE CHARGE (nC)
NOTE: Refer to Intersil Application Notes AN7254 and AN7260.
FIGURE 14. GATE CHARGE WAVEFORMS FOR CONSTANT
GATE CURRENT
80
VGS = 10V, VDD = 30V, ID = 3.8A
60
40
td(OFF)
tf
20
0
0
tr
td(ON)
10 20 30 40
RGS, GATE TO SOURCE RESISTANCE (Ω)
50
FIGURE 16. SWITCHING TIME vs GATE RESISTANCE
5 Page SPICE Thermal Model
REV 1June 1999
HUF76407DK8
Copper Area = 0.02 in2
CTHERM1 th 8 8.5e-4
CTHERM2 8 7 1.8e-3
CTHERM3 7 6 5.0e-3
CTHERM4 6 5 1.3e-2
CTHERM5 5 4 4.0e-2
CTHERM6 4 3 9.0e-2
CTHERM7 3 2 4.0e-1
CTHERM8 2 tl 1.4
RTHERM1 th 8 3.5e-2
RTHERM2 8 7 6.0e-1
RTHERM3 7 6 2
RTHERM4 6 5 8
RTHERM5 5 4 18
RTHERM6 4 3 39
RTHERM7 3 2 42
RTHERM8 2 tl 48
SABER Thermal Model
Copper Area = 0.02 in2
template thermal_model th tl
thermal_c th, tl
{
ctherm.ctherm1 th 8 = 8.5e-4
ctherm.ctherm2 8 7 = 1.8e-3
ctherm.ctherm3 7 6 = 5.0e-3
ctherm.ctherm4 6 5 = 1.3e-2
ctherm.ctherm5 5 4 = 4.0e-2
ctherm.ctherm6 4 3 = 9.0e-2
ctherm.ctherm7 3 2 = 4.0e-1
ctherm.ctherm8 2 tl = 1.4
rtherm.rtherm1 th 8 = 3.5e-2
rtherm.rtherm2 8 7 = 6.0e-1
rtherm.rtherm3 7 6 = 2
rtherm.rtherm4 6 5 = 8
rtherm.rtherm5 5 4 = 18
rtherm.rtherm6 4 3 = 39
rtherm.rtherm7 3 2 = 42
rtherm.rtherm8 2 tl = 48
}
COMPONANT
CTHERM6
CTHERM7
CTHERM8
RTHERM6
RTHERM7
RTHERM8
0.02 in2
9.0e-2
4.0e-1
1.4
39
42
48
HUF76407DK8
th JUNCTION
RTHERM1
RTHERM2
RTHERM3
RTHERM4
RTHERM5
RTHERM6
RTHERM7
RTHERM8
8
7
6
5
4
3
2
CTHERM1
CTHERM2
CTHERM3
CTHERM4
CTHERM5
CTHERM6
CTHERM7
CTHERM8
tl AMBIENT
TABLE 1. Thermal Models
0.14 in2
0.257 in2
1.3e-1
1.5e-1
6.0e-1
4.5e-1
2.5 2.2
26 20
32 31
35 38
0.38 in2
1.5e-1
6.5e-1
3
20
29
31
0.493 in2
1.5e-1
7.5e-1
3
20
23
25
11
11 Page |
Páginas | Total 12 Páginas | |
PDF Descargar | [ Datasheet HUF76407DK8.PDF ] |
Número de pieza | Descripción | Fabricantes |
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