HUF75531SK8 Datasheet PDF - Fairchild Semiconductor
| Part Number | HUF75531SK8 | |
| Description | 6A/ 80V/ 0.030 Ohm/ N-Channel/ UltraFET Power MOSFET | |
| Manufacturers | Fairchild Semiconductor | |
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Data Sheet
HUF75531SK8
December 2001
6A, 80V, 0.030 Ohm, N-Channel,
UltraFET Power MOSFET
Packaging
JEDEC MS-012AA
BRANDING DASH
1
2
3
4
5
Symbol
SOURCE (1)
SOURCE (2)
SOURCE (3)
GATE (4)
DRAIN (8)
DRAIN (7)
DRAIN (6)
DRAIN (5)
Features
• Ultra Low On-Resistance
- rDS(ON) = 0.030Ω, VGS = 10V
• Simulation Models
- Temperature Compensated PSPICE® and SABER™
Electrical Models
- Spice and SABER Thermal Impedance Models
- www.fairchildsemi.com
• Peak Current vs Pulse Width Curve
• UIS Rating Curve
Ordering Information
PART NUMBER
PACKAGE
BRAND
HUF75531SK8
MS-012AA
75531SK8
NOTE: When ordering, use the entire part number. Add the suffix T
to obtain the variant in tape and reel, e.g., HUF75531SK8T.
Absolute Maximum Ratings TA = 25oC, Unless Otherwise Specified
HUF75531SK8
UNITS
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDSS
Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS
Drain Current
Continuous (TA= 25oC, VGS = 10V) (Figure 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID
Continuous (TA= 100oC, VGS = 10V) (Figure 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID
Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM
Pulsed Avalanche Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . UIS
80
80
±20
6
4
Figure 4
Figures 6, 14, 15
V
V
V
A
A
Power Dissipation . . .
Derate Above 25oC
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PD
..
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL
Package Body for 10s, See Techbrief TB370. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg
NOTES:
1. TJ = 25oC to 125oC.
2. 50oC/W measured using FR-4 board with 0.76 in2 (490.3 mm2) copper pad at 10 second.
3. 152oC/W measured using FR-4 board with 0.054 in2 (34.8 mm2) copper pad at 1000 seconds
4. 189oC/W measured using FR-4 board with 0.0115 in2 (7.42 mm2) copper pad at 1000 seconds
2.5
20
-55 to 150
300
260
W
mW/oC
oC
oC
oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Product reliability information can be found at http://www.fairchildsemi.com/products/discrete/reliability/index.html
For severe environments, see our Automotive HUFA series.
All Fairchild semiconductor products are manufactured, assembled and tested under ISO9000 and QS9000 quality systems certification.
©2001 Fairchild Semiconductor Corporation
HUF75531SK8 Rev. B
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HUF75531SK8
Typical Performance Curves (Continued)
1.2
ID = 250µA
1.1
1.0
0.9
-80
-40 0 40 80 120
TJ, JUNCTION TEMPERATURE (oC)
160
FIGURE 11. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE
10
VDD = 40V
8
3000
1000
COSS ≅ CDS + CGD
VGS = 0V, f = 1MHz
CISS = CGS + CGD
100
CRSS = CGD
30
0.1
1.0 10
VDS , DRAIN TO SOURCE VOLTAGE (V)
80
FIGURE 12. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
6
4
WAVEFORMS IN
DESCENDING ORDER:
2 ID = 6A
ID = 1A
0
0 10 20 30 40
Qg, GATE CHARGE (nC)
NOTE: Refer to Fairchild Application Notes AN7254 and AN7260.
FIGURE 13. GATE CHARGE WAVEFORMS FOR CONSTANT GATE CURRENT
Test Circuits and Waveforms
VARY tP TO OBTAIN
REQUIRED PEAK IAS
VGS
tP
0V
RG
VDS
L
DUT
+
VDD
-
IAS
0.01Ω
FIGURE 14. UNCLAMPED ENERGY TEST CIRCUIT
tP
IAS
BVDSS
VDS
VDD
0
tAV
FIGURE 15. UNCLAMPED ENERGY WAVEFORMS
©2001 Fairchild Semiconductor Corporation
HUF75531SK8 Rev. B
Preview 5 Page |
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| Information | Total 10 Pages | |
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