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PDF HYB3164405BT-60 Data sheet ( Hoja de datos )
| Número de pieza | HYB3164405BT-60 | |
| Descripción | 16M x 4-Bit Dynamic RAM | |
| Fabricantes | Siemens Semiconductor Group | |
| Logotipo |  |
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16M x 4-Bit Dynamic RAM
(4k & 8k Refresh, EDO-version)
HYB 3164405BJ/BT(L) -40/-50/-60
HYB 3165405BJ/BT(L) -40/-50/-60
Preliminary Information
• 16 777 216 words by 4-bit organization
• 0 to 70 °C operating temperature
• Hyper Page Mode - EDO - operation
• Performance:
-40 -50 -60
tRAC
tCAC
tAA
tRC
tHPC
RAS access time
CAS access time
Access time from address
Read/write cycle time
Hyper page mode (EDO)
cycle time
40
10
20
69
16
50 60 ns
13 15 ns
25 30 ns
84 104 ns
20 25 ns
• Single + 3.3 V (± 0.3V) power supply
• Low power dissipation:
max. 306 active mW ( HYB 3164405BJ/BT(L)-40)
max. 252 active mW ( HYB 3164405BJ/BT(L)-50)
max. 216 active mW ( HYB 3164405BJ/BT(L)-60)
max. 486 active mW ( HYB 3165405BJ/BT(L)-40)
max. 396 active mW ( HYB 3165405BJ/BT(L)-50)
max. 324 active mW ( HYB 3165405BJ/BT(L)-60)
7.2 mW standby (LVTTL)
3.6 mW standby (LVMOS)
720 µA standby for L-version
• Read, write, read-modify-write, CAS-before-RAS refresh (CBR),
RAS-only refresh, hidden refresh
• Self refresh (L-version only)
• 8192 refresh cycles/128 ms, 13 R/ 11C addresses (HYB 3164405BJ/BT)
4096 refresh cycles / 64 ms, 12 R/ 12C addresses (HYB 3165405BJ/BT)
• 128 msec refresh period for L-versions
• Plastic Package:
P-SOJ-32-1 400 mil HYB 3164(5)400BJ
P-TSOPII-32-1 400 mil HYB 3164(5)400BT(L)
Semiconductor Group
1
12.97
1 page  
HYB3164(5)405BJ/BT(L)-40/-50/-60
16M x 4-DRAM
I/O1 I/O2
I/O4
WE
.CAS
&
No. 2 Clock
Generator
Data in
Buffer
4
Data out
Buffer
4
OE
Column
12 Address
A0 Buffer(12)
A1
12 Column
Decoder
A2
A3 Refresh
A4 Controller
A5
Sense Amplifier
I/O Gating
4
A6
A7 Refresh
A8 Counter (12)
A9
A10 12
4096
x4
A11 Row
Row
Memory Array
12 Address
Buffers(12)
12 Decoder 4096 4096 x 4096 x 4
RAS
No. 1 Clock
Generator
Block Diagram for HYB 3164405BJ/BT(L)
Semiconductor Group
5
5 Page 
HYB3164(5)405BJ/BT(L)-40/-50/-60
16M x 4-DRAM
AC Characteristics (cont’d) 5)6)
TA = 0 to 70 °C,VCC = 3.3 V ± 0.3V , tT = 2 ns
AC64-2E
Parameter
Symbol
- 40
Limit Values
- 50 - 60
Unit Note
min. max. min. max. min. max.
RAS pulse width in hyper page mode tRAS
CAS precharge to RAS Delay
tRHPC
OE pulse width
tOEP
OE hold time from CAS high
tOEHC
Output buffer turn-off delay from WE tWEZ
OE setup time prior to CAS
tOES
40 200k 50 200k 60 200k ns
22 – 27 – 32 – ns
5 – 5 – 5 – ns
5 – 5 – 5 – ns
0 10 0 13 0 15 ns
5 – 5 – 5 – ns
Hyper Page Mode (EDO) Read-
modify-Write Cycle
Hyper page mode (EDO) read-write tPRWC
cycle time
44 – 54 – 63 – ns
CAS precharge to WE
tCPWD 34 – 42 – 49 – ns
CAS before RAS Refresh Cycle
CAS setup time
CAS hold time
RAS to CAS precharge time
Write to RAS precharge time
Write hold time referenced to RAS
tCSR
tCHR
tRPC
tWRP
tWRH
5 – 5 – 5 – ns
5 – 5 – 10 – ns
5 – 5 – 5 – ns
5 – 5 – 10 – ns
5 – 5 – 10 – ns
Self Refresh Cycle (L-versions only)
RAS pulse width
RAS precharge time
CAS hold time
tRASS
tRPS
tCHS
100k
100k _ 100k _
69 – 84 – 104 –
-50 – -50 – -50 –
ns 17
ns 17
ns 17
Test Mode Cycle
Write command setup time
Write command hold time
tWTS 5 – 5 – 5 – ns 18
tWTH 5 – 5 – 5 – ns 18
Semiconductor Group
11
11 Page | ||
| Páginas | Total 29 Páginas | |
| PDF Descargar | [ Datasheet HYB3164405BT-60.PDF ] | |
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