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PDF HYB3164405ATL-60 Data sheet ( Hoja de datos )
| Número de pieza | HYB3164405ATL-60 | |
| Descripción | 16M x 4-Bit Dynamic RAM | |
| Fabricantes | Siemens Semiconductor Group | |
| Logotipo |  |
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16M x 4-Bit Dynamic RAM
(4k & 8k Refresh, EDO-Version)
HYB 3164405AJ/AT(L) -40/-50/-60
HYB 3165405AJ/AT(L) -40/-50/-60
Advanced Information
• 16 777 216 words by 4-bit organization
• 0 to 70 °C operating temperature
• Hyper Page Mode - EDO - operation
• Performance:
-40 -50 -60
tRAC RAS access time
40 50 60 ns
tCAC CAS access time
10 13 15 ns
tAA Access time from address 20 25 30 ns
tRC Read/write cycle time
69 84 104 ns
tHPC Hyper page mode (EDO) 16 20 25 ns
cycle time
• Single + 3.3 V (± 0.3V) power supply
• Low power dissipation:
max. 450 active mW ( HYB 3164405AJ/AT(L)-40)
max. 360 active mW ( HYB 3164405AJ/AT(L)-50)
max. 324 active mW ( HYB 3164405AJ/AT(L)-60)
max. 612 active mW ( HYB 3165405AJ/AT(L)-40)
max. 405 active mW ( HYB 3165405AJ/AT(L)-50)
max. 432 active mW ( HYB 3165405AJ/AT(L)-60)
7.2 mW standby (LVTTL)
3.24 mW standby (LVMOS)
720 µA standby for L-version
• Read, write, read-modify-write, CAS-before-RAS refresh (CBR),
RAS-only refresh, hidden refresh
• Self refresh (L-version only)
• 8192 refresh cycles/128 ms , 13 R/ 11C addresses (HYB 3164405AJ/AT)
4096 refresh cycles/ 64 ms , 12 R/ 12C addresses (HYB 3165405AJ/AT)
• 256 msec refresh period for L-versions
• Plastic Package:
P-SOJ-32-1 400 mil HYB 3164(5)400AJ
P-TSOPII-32-1 400 mil HYB 3164(5)400AT(L)
Semiconductor Group
1
6.97
1 page  
HYB3164(5)405AJ/AT(L)-40/-50/-60
16M x 4-DRAM
I/O1 I/O2
I/O4
WE
.CAS
&
No. 2 Clock
Generator
Data in
Buffer
4
Data out
Buffer
4
OE
Column
12 Address
A0 Buffer(12)
A1
12 Column
Decoder
A2
A3 Refresh
A4 Controller
A5
Sense Amplifier
I/O Gating
4
A6
A7 Refresh
A8 Counter (12)
A9
12
A10
4096
x4
A11 Row
Row
Memory Array
12 Address
Buffers(12)
12 Decoder 4096 4096 x 4096 x 4
RAS
No. 1 Clock
Generator
Block Diagram for HYB 3165405AJ/AT(L)
Semiconductor Group
5
5 Page 
HYB3164(5)405AJ/AT(L)-40/-50/-60
16M x 4-DRAM
AC Characteristics (cont’d) 5)6)
TA = 0 to 70 °C,VCC = 3.3 V ± 0.3V , tT = 2 ns
AC64-2E
Parameter
Symbol
Limit Values
Unit Note
- 40
- 50
- 60
min. max. min. max. min. max.
RAS pulse width in hyper page mode tRAS
40 200k 50 200k 60 200k ns
CAS precharge to RAS Delay
tRHPC 22 –
27 –
32 –
ns
OE pulse width
tOEP 5 – 5 – 5 – ns
OE hold time from CAS high
tOEHC 5 – 5 – 5 – ns
Output buffer turn-off delay from WE tWEZ 0 10 0 13 0 15 ns
OE setup time prior to CAS
tOES 5 – 5 – 5 – ns
Hyper Page Mode (EDO) Read-
modify-Write Cycle
Hyper page mode (EDO) read-write tPRWC 44 –
cycle time
CAS precharge to WE
tCPWD 34 –
54 –
42 –
63 –
49 –
ns
ns
CAS before RAS Refresh Cycle
CAS setup time
tCSR 5 – 5 – 5 – ns
CAS hold time
tCHR 5 – 5 – 10 – ns
RAS to CAS precharge time
tRPC 5 – 5 – 5 – ns
Write to RAS precharge time
tWRP 5 – 5 – 10 – ns
Write hold time referenced to RAS tWRH 5 – 5 – 10 – ns
Self Refresh Cycle (L-versions only)
RAS pulse width
RAS precharge time
CAS hold time
tRASS
tRPS
tCHS
100k
69 –
-50 –
100k _
84 –
-50 –
100k _
104 –
-50 –
ns 17
ns 17
ns 17
Test Mode Cycle
Write command setup time
Write command hold time
tWTS 5 – 5 – 5 – ns 18
tWTH 5 – 5 – 5 – ns 18
Semiconductor Group
11
11 Page | ||
| Páginas | Total 29 Páginas | |
| PDF Descargar | [ Datasheet HYB3164405ATL-60.PDF ] | |
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