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PDF ADG722 Data sheet ( Hoja de datos )
| Número de pieza | ADG722 | |
| Descripción | CMOS Low Voltage 4 ohm Dual SPST Switches | |
| Fabricantes | Analog Devices | |
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Data Sheet
CMOS, Low Voltage, 4 Ω Dual SPST
Switches in 3 mm × 2 mm LFCSP
ADG721/ADG722/ADG723
FEATURES
1.8 V to 5.5 V single supply
4 Ω (max) on resistance
Low on resistance flatness
−3 dB bandwidth >200 MHz
Tiny package options
8-lead MSOP
3 mm × 2 mm LFCSP (A grade)
Fast switching times
tON, 20 ns
tOFF, 10 ns
Low power consumption (<0.1 μW)
TTL/CMOS compatible
APPLICATIONS
USB 1.1 signal switching circuits
Cell phones
PDAs
Battery-powered systems
Communication systems
Sample hold systems
Audio signal routing
Video switching
Mechanical reed relay replacement
FUNCTIONAL BLOCK DIAGRAMS
ADG721
ADG722
S1 S1
IN1
D1 D1
D2
IN2 IN2
S2
IN1
D2
S2
Figure 1.
ADG723
S1
D1
IN2
Figure 2.
IN1
D2
S2
SWITCHES SHOWN FOR
A LOGIC "0" INPUT
Figure 3.
GENERAL DESCRIPTION
The ADG721, ADG722, and ADG723 are monolithic CMOS
SPST switches. These switches are designed on an advanced
submicron process that provides low power dissipation yet gives
high switching speed, low on resistance, and low leakage
currents. The devices are packaged in both a tiny 3 mm × 2 mm
LFCSP and an MSOP, making them ideal for space-constrained
applications.
The ADG721, ADG722, and ADG723 are designed to operate
from a single 1.8 V to 5.5 V supply, making them ideal for use
in battery-powered instruments and with the new generation of
DACs and ADCs from Analog Devices, Inc.
The ADG721, ADG722, and ADG723 contain two independent
single-pole/single-throw (SPST) switches. The ADG721 and
ADG722 differ only in that both switches are normally open
and normally closed, respectively. In the ADG723, Switch 1 is
normally open and Switch 2 is normally closed.
Each switch of the ADG721, ADG722, and ADG723 conducts
equally well in both directions when on. The ADG723 exhibits
break-before-make switching action.
PRODUCT HIGHLIGHTS
1. 1.8 V to 5.5 V single-supply operation.
2. Very low RON (4 Ω max at 5 V, 10 Ω max at 3 V).
3. Low on resistance flatness.
4. −3 dB bandwidth >200 MHz.
5. Low power dissipation. CMOS construction ensures low
power dissipation.
6. 8-lead MSOP and 3 mm × 2 mm LFCSP.
Rev. E
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2004-2011 Analog Devices, Inc. All rights reserved.
1 page  
Data Sheet
ABSOLUTE MAXIMUM RATINGS
TA = 25°C unless otherwise noted.
Table 3.
Parameter
VDD to GND
Analog, Digital Inputs1
Continuous Current, S or D
Operating Temperature Range
Industrial (A, B Grade)
Storage Temperature Range
Junction Temperature
8-Lead MSOP
θJA Thermal Impedance
θJC Thermal Impedance
8-Lead LFCSP (4-Layer Board)
θJA Thermal Impedance1
Lead Temperature, Soldering
Vapor Phase (60 sec)
Infrared (15 sec)
Lead-Free Temperature,
Soldering
IR Reflow, Peak Temperature
Time at Peak Temperature
ESD
Rating
−0.3 V to +7 V
−0.3 V to VDD + 0.3 V or 30 mA,
whichever occurs first
30 mA
−40°C to +85°C
−65°C to +150°C
+150°C
206°C/W
44°C/W
50.8°C/W
215°C
220°C
260°C (+0/−5°C)
10 sec to 40 sec
2 kV
1Assumes exposed paddle is tied to ground.
ADG721/ADG722/ADG723
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
Rev. E | Page 5 of 16
5 Page 
Data Sheet
ADG721/ADG722/ADG723
VDD
0.1µF
VDD
0.1µF
VDD
S
D
VS VIN IN
GND
RL
50Ω
VOUT
VDD
S
D
VS
IN
VIN
GND
RL
50Ω
VOUT
Figure 18. Off Isolation
VS
NC
VDD
0.1µF
Figure 19. Channel-to-Channel Crosstalk
VDD
S
D
50Ω
VIN1
SD
GND
VIN2
VOUT
RL
50Ω
CHANNEL-TO-CHANNEL
CROSSTALK
= 20 × log |VS/VOUT|
Figure 20. Bandwidth
Rev. E | Page 11 of 16
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet ADG722.PDF ] | |
Hoja de datos destacado
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