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PDF ADG702 Data sheet ( Hoja de datos )

Número de pieza ADG702
Descripción CMOS Low Voltage 2ohm SPST Switches
Fabricantes Analog Devices 
Logotipo Analog Devices Logotipo



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a
FEATURES
+1.8 V to +5.5 V Single Supply
2 (Typ) On Resistance
Low On-Resistance Flatness
–3 dB Bandwidth >200 MHz
Rail-to-Rail Operation
6-Lead SOT-23
8-Lead SOIC Package
Fast Switching Times
tON 18 ns
tOFF 12 ns
Typical Power Consumption (<0.01 W)
TTL/CMOS Compatible
APPLICATIONS
Battery Powered Systems
Communication Systems
Sample Hold Systems
Audio Signal Routing
Video Switching
Mechanical Reed Relay Replacement
CMOS
Low Voltage 2 SPST Switches
ADG701/ADG702
FUNCTIONAL BLOCK DIAGRAMS
ADG701
SD
IN
ADG702
SD
IN
SWITCHES SHOWN FOR
A LOGIC "1" INPUT
GENERAL DESCRIPTION
The ADG701/ADG702 are monolithic CMOS SPST switches.
These switches are designed on an advanced submicron process
that provides low power dissipation yet high switching speed,
low on resistance, low leakage currents and –3 dB bandwidths of
greater than 200 MHz can be achieved.
The ADG701/ADG702 can operate from a single +1.8 V to
+5.5 V supply making it ideal for use in battery powered instru-
ments and with the new generation of DACs and ADCs from
Analog Devices.
As can be seen from the Functional Block Diagrams, with a
logic input of “1” the switch of the ADG701 is closed, while
that of the ADG702 is open. Each switch conducts equally well
in both directions when ON.
The ADG701/ADG702 are available in 6-lead SOT-23 and
8-lead µSOIC packages.
PRODUCT HIGHLIGHTS
1. +1.8 V to +5.5 V Single Supply Operation. The ADG701/
ADG702 offer high performance, including low on resistance
and fast switching times and is fully specified and guaranteed
with +3 V and +5 V supply rails.
2. Very Low RON (3 max at 5 V, 5 max at 3 V). At 1.8 V
operation, RON is typically 40 over the temperature range.
3. On-Resistance Flatness RFLAT(ON) (1 max).
4. –3 dB Bandwidth >200 MHz.
5. Low Power Dissipation. CMOS construction ensures low
power dissipation.
6. Fast tON/tOFF.
7. Tiny 6-Lead SOT-23 and 8-Lead µSOIC.
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 1998

1 page




ADG702 pdf
PIN CONFIGURATIONS
8-Lead SOIC
(RM-8)
D1
8S
NC 2
ADG701/
ADG702
7 GND
NC 3 TOP VIEW 6 IN
VDD 4 (Not to Scale) 5 NC
NC = NO CONNECT
6-Lead Plastic Surface Mount (SOT-23)
(RT-6)
D1
6 VDD
ADG701/
S 2 ADG702 5 NC
GND 3 TOP VIEW 4 IN
(Not to Scale)
NC = NO CONNECT
ADG701/ADG702
TERMINOLOGY
VDD
GND
S
D
IN
RON
RFLAT(ON)
IS (OFF)
ID (OFF)
ID, IS (ON)
VD (VS)
CS (OFF)
CD (OFF)
CD, CS (ON)
tON
tOFF
Off Isolation
Charge
Injection
Bandwidth
On Response
On Loss
Most Positive Power Supply Potential.
Ground (0 V) Reference.
Source Terminal. May be an input or output.
Drain Terminal. May be an input or output.
Logic Control Input.
Ohmic Resistance Between D and S.
Flatness is defined as the difference between
the maximum and minimum value of on
resistance as measured over the specified
analog signal range.
Source Leakage Current with the Switch “OFF.”
Drain Leakage Current with the Switch “OFF.”
Channel Leakage Current with the Switch “ON.”
Analog Voltage on Terminals D, S.
“OFF” Switch Source Capacitance.
“OFF” Switch Drain Capacitance.
“ON” Switch Capacitance.
Delay between applying the digital control
input and the output switching on. See Test
Circuit 4.
Delay between applying the digital control
input and the output switching off.
A measure of Unwanted Signal Coupling
Through an “OFF” Switch.
A measure of the glitch impulse transferred
from the digital input to the analog output
during switching.
The frequency at which the output is attenu-
ated by –3 dBs.
The frequency response of the “ON” switch.
The voltage drop across the “ON” switch seen
on the On Response vs. Frequency plot as how
many dBs the signal is away from 0 dB at very
low frequencies.
REV. A
–5–

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