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PDF ADG452 Data sheet ( Hoja de datos )
| Número de pieza | ADG452 | |
| Descripción | LC2MOS 5 ohm RON SPST Switches | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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FEATURES
Low on resistance (4 Ω)
On resistance flatness (0.2 Ω)
44 V supply maximum ratings
±15 V analog signal range
Fully specified at ±5 V, 12 V, ±15 V
Ultralow power dissipation (18 μW)
ESD 2 kV
Continuous current (100 mA)
Fast switching times
tON 70 ns
tOFF 60 ns
TTL-/CMOS-compatible
Pin-compatible upgrade for ADG411/ADG412/ADG413
and ADG431/ADG432/ADG433
APPLICATIONS
Relay replacement
Audio and video switching
Automatic test equipment
Precision data acquisition
Battery-powered systems
Sample-and-hold systems
Communication systems
PBX, PABX systems
Avionics
GENERAL DESCRIPTION
The ADG451/ADG452/ADG453 are monolithic CMOS
devices comprising four independently selectable switches.
They are designed on an enhanced LC2MOS process that
provides low power dissipation yet gives high switching
speed and low on resistance.
The on resistance profile is very flat over the full analog input
range, ensuring excellent linearity and low distortion when
switching audio signals. Fast switching speed, coupled with high
signal bandwidth, makes the parts suitable for video signal
switching. CMOS construction ensures ultralow power dissipa-
tion, making the parts ideally suited for portable and battery-
powered instruments.
The ADG451/ADG452/ADG453 contain four independent,
single-pole/single-throw (SPST) switches. The ADG451 and
ADG452 differ only in that the digital control logic is inverted. The
ADG451 switches are turned on with a logic low on the appropriate
control input, while a logic high is required for the ADG452.
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
LC2MOS
5 Ω RON SPST Switches
ADG451/ADG452/ADG453
FUNCTIONAL BLOCK DIAGRAMS
IN1
IN2
ADG451
IN3
IN4
S1
D1
S2
D2
S3
D3
S4
D4
SWITCHES SHOWN FOR A LOGIC 1 INPUT.
Figure 1. ADG451
IN1
IN2
ADG452
IN3
IN4
S1
D1
S2
D2
S3
D3
S4
D4
SWITCHES SHOWN FOR A LOGIC 1 INPUT.
Figure 2. ADG452
IN1
IN2
ADG453
IN3
IN4
S1
D1
S2
D2
S3
D3
S4
D4
SWITCHES SHOWN FOR A LOGIC 1 INPUT.
Figure 3. ADG453
The ADG453 has two switches with digital control logic similar
to that of the ADG451, while the logic is inverted on the other
two switches.
Each switch conducts equally well in both directions when on,
and each has an input signal range that extends to the supplies.
In the off condition, signal levels up to the supplies are blocked.
The ADG453 exhibits break-before-make switching action for
use in multiplexer applications. Inherent in the design is low
charge injection for minimum transients when switching the
digital inputs.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2006 Analog Devices, Inc. All rights reserved.
1 page  
ADG451/ADG452/ADG453
12 V SINGLE SUPPLY
VDD = 12 V, VSS = 0 V, VL = 5 V, GND = 0 V. All specifications TMIN to TMAX, unless otherwise noted.
Table 2.
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance (RON)
On Resistance Match Between Channels (ΔRON)
On Resistance Flatness (RFLAT(ON))
LEAKAGE CURRENTS2, 3
Source Off Leakage, IS (OFF)
Drain Off Leakage, ID (OFF)
Channel On Leakage, ID, IS (ON)
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current, IINL or IINH
DYNAMIC CHARACTERISTICS4
tON
tOFF
Break-Before-Make Time Delay, tD (ADG453 Only)
Charge Injection
Channel-to-Channel Crosstalk
CS (OFF)
CD (OFF)
CD, CS (ON)
POWER REQUIREMENTS
IDD
IL
IGND4
B Version1
25°C
TMIN to TMAX Unit
0 V to VDD
V
6 Ω typ
8 10
Ω max
0.1 Ω typ
0.5 0.5
Ω max
1.0 1.0
Ω typ
±0.02
±0.5
±0.02
±0.5
±0.04
±1
±2.5
±2.5
±5
nA typ
nA max
nA typ
nA max
nA typ
nA max
0.005
2.4
0.8
±0.5
V min
V max
μA typ
μA max
100
220 260
80
160 200
15
10 10
10
−90
60
60
100
ns typ
ns max
ns typ
ns max
ns typ
ns min
pC typ
dB typ
pF typ
pF typ
pF typ
0.0001
0.5
0.0001
0.5
0.0001
0.5
5
5
5
μA typ
μA max
μA typ
μA max
μA typ
μA max
Test Conditions/Comments
VD = 0 V to +10 V, IS = −10 mA
VD = 10 V, IS = −10 mA
VD = 0 V, 5 V, IS = −10 mA
VD = 0 V, 10 V, VS = 0 V, 10 V; see Figure 17
VD = 0 V, 10 V, VS = 0 V, 10 V; see Figure 17
VD = VS = 0 V, 10 V; see Figure 18
VIN = VINL or VINH
RL = 300 Ω, CL = 35 pF, VS = 8 V; see Figure 19
RL = 300 Ω, CL = 35 pF, VS = 8 V; see Figure 19
RL = 300 Ω, CL = 35 pF, VS1 = VS2 = 8 V;
see Figure 20
VS = 6 V, RS = 0 Ω, CL = 1.0 nF; see Figure 21
RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 23
f = 1 MHz
f = 1 MHz
f = 1 MHz
VDD = 13.2 V; digital inputs = 0 V or 5 V
VL = 5.5 V
VL = 5.5 V
1 Temperature range for B version is −40°C to +85°C.
2 TMAX = 70°C.
3 Tested with dual supplies.
4 Guaranteed by design, not subject to production test.
Rev. C | Page 5 of 16
5 Page 
TERMINOLOGY
RON
Ohmic resistance between D and S.
ΔRON
On resistance match between any two channels, that is, RON
maximum minus RON minimum.
RFLAT(ON)
Flatness is defined as the difference between the maximum and
minimum value of on resistance, as measured over the specified
analog signal range.
IS (OFF)
Source leakage current with the switch off.
ID (OFF)
Drain leakage current with the switch off.
ID, IS (ON)
Channel leakage current with the switch on.
VD (VS)
Analog voltage on Terminal D and Terminal S.
CS (OFF)
Off switch source capacitance.
CD (OFF)
Off switch drain capacitance.
ADG451/ADG452/ADG453
CD (ON), CS (ON)
On switch capacitance.
tON
Delay between applying the digital control input and the output
switching on. See Figure 19.
tOFF
Delay between applying the digital control input and the output
switching off.
tD
Off time or on time measured between the 90% points of both
switches, when switching from one address state to another. See
Figure 20.
Crosstalk
A measure of unwanted signal coupled through from one
channel to another as a result of parasitic capacitance.
Off Isolation
A measure of unwanted signal coupling through an off switch.
Charge Injection
A measure of the glitch impulse transferred from the digital
input to the analog output during switching.
Rev. C | Page 11 of 16
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet ADG452.PDF ] | |
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