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PDF ADG1408 Data sheet ( Hoja de datos )
| Número de pieza | ADG1408 | |
| Descripción | Multiplexers | |
| Fabricantes | Analog Devices | |
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Data Sheet
4 Ω RON, 4-/8-Channel,
±15 V/+12 V/±5 V iCMOS Multiplexers
ADG1408/ADG1409
FEATURES
4.7 Ω maximum on resistance at 25°C
0.5 Ω on-resistance flatness
Up to 190 mA continuous current
Fully specified at ±15 V/+12 V/±5 V
3 V logic-compatible inputs
Rail-to-rail operation
Break-before-make switching action
16-lead TSSOP and 4 mm × 4 mm LFCSP
APPLICATIONS
Relay replacement
Audio and video routing
Automatic test equipment
Data acquisition systems
Temperature measurement systems
Avionics
Battery-powered systems
Communication systems
Medical equipment
GENERAL DESCRIPTION
The ADG1408/ADG1409 are monolithic iCMOS® analog multip-
lexers comprising eight single channels and four differential
channels, respectively. The ADG1408 switches one of eight
inputs to a common output, as determined by the 3-bit binary
address lines, A0, A1, and A2. The ADG1409 switches one of
four differential inputs to a common differential output, as
determined by the 2-bit binary address lines, A0 and A1. An EN
input on both devices is used to enable or disable the device.
When disabled, all channels are switched off.
The industrial CMOS (iCMOS) modular manufacturing process
combines high voltage complementary metal-oxide semiconductor
(CMOS) and bipolar technologies. It enables the development
of a wide range of high performance analog ICs capable of 33 V
operation in a footprint that no other generation of high voltage
devices has been able to achieve. Unlike analog ICs using
conventional CMOS processes, iCMOS components can tolerate
high supply voltages while providing increased performance,
dramatically lower power consumption, and reduced package size.
FUNCTIONAL BLOCK DIAGRAMS
ADG1408
ADG1409
S1 S1A
DA
S4A
D
S1B
DB
S8 S4B
1-OF-8
DECODER
1-OF-4
DECODER
A0 A1 A2 EN
A0 A1 EN
Figure 1.
The ultralow on resistance and on resistance flatness of these
switches make them ideal solutions for data acquisition and
gain switching applications where low distortion is critical.
iCMOS construction ensures ultralow power dissipation,
making the devices ideally suited for portable and battery-
powered instruments.
PRODUCT HIGHLIGHTS
1. 4 Ω on resistance.
2. 0.5 Ω on-resistance flatness.
3. 3 V logic compatible digital input, VIH = 2.0 V, VIL = 0.8 V.
4. 16-lead TSSOP and 4 mm × 4 mm LFCSP.
Table 1. Related Devices
Device No.
Description
ADG1208/ADG1209
Low capacitance, low charge injection,
and low leakage 4-/8-channel ±15 V
multiplexers
Rev. D
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2006–2016 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
1 page  
Data Sheet
ADG1408/ADG1409
12 V SINGLE SUPPLY
VDD = 12 V ± 10%, VSS = 0 V, GND = 0 V, unless otherwise noted.
Table 3.
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance (RON)
On-Resistance Match Between
Channels (ΔRON)
On-Resistance Flatness (RFLAT(ON))
LEAKAGE CURRENTS
Source Off Leakage, IS (Off )
Drain Off Leakage, ID (Off )
Channel On Leakage, ID, IS (On)
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current
−40°C to
+25°C +85°C
6
8 9.5
0.2
0.82 0.85
1.5
2.5 2.5
±0.04
±0.2
±0.04
±0.45
±0.06
±0.44
±0.6
±1
±1.3
±0.005
Digital Input Capacitance, CIN
DYNAMIC CHARACTERISTICS2
Transition Time, tTRANSITION
Break-Before-Make Time Delay, tBBM
5
200
260
90
330
tON (EN)
tOFF (EN)
Charge Injection
Off Isolation
Channel-to-Channel Crosstalk
−3 dB Bandwidth
ADG1408
ADG1409
Insertion Loss
CS (Off )
CD (Off )
ADG1408
ADG1409
CD, CS (On)
ADG1408
ADG1409
160
210 250
115
145 180
−12
−70
−70
36
72
0.5
25
165
80
200
120
−40°C to
+125°C1
0 to VDD
11.2
1.1
2.8
±5
±37
±32
2.0
0.8
±0.1
380
40
285
200
Unit
V
Ω typ
Ω max
Ω typ
Ω max
Ω typ
Ω max
nA typ
nA max
nA typ
nA max
nA typ
nA max
V min
V max
μA typ
μA max
pF typ
ns typ
ns max
ns typ
ns min
ns typ
ns max
ns typ
ns max
pC typ
dB typ
dB typ
MHz typ
MHz typ
dB typ
pF typ
pF typ
pF typ
pF typ
pF typ
Test Conditions/Comments
VS = 0 V to 10 V, IS = −10 mA; see Figure 26
VDD = 10.8 V, VSS = 0 V
VS = 0 V to 10 V, IS = −10 mA
VS = 0 V to 10 V, IS = −10 mA
VDD = 13.2 V
VS = 1 V/10 V, VD = 10 V/1 V; see Figure 27
VS = 1 V/10 V, VD = 10 V/1 V; see Figure 27
VS = VD = 1 V or 10 V; see Figure 28
VIN = VGND or VDD
RL = 100 Ω, CL = 35 pF
VS = 8 V; see Figure 29
RL = 100 Ω, CL = 35 pF
VS1 = VS2 = 8 V; see Figure 30
RL = 100 Ω, CL = 35 pF
VS = 8 V; see Figure 31
RL = 100 Ω, CL = 35 pF
VS = 8 V; see Figure 31
VS = 6 V, RS = 0 Ω, CL = 1 nF; see Figure 32
RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 33
RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 34
RL = 50 Ω, CL = 5 pF; see Figure 35
RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 35
f = 1 MHz
f = 1 MHz
f = 1 MHz
Rev. D | Page 5 of 19
5 Page 
Data Sheet
ADG1408/ADG1409
A0 1
EN 2
VSS 3
S1A 4
S2A 5
S3A 6
S4A 7
DA 8
16 A1
15 GND
ADG1409
TOP VIEW
(Not to Scale)
14 VDD
13 S1B
12 S2B
11 S3B
10 S4B
9 DB
VSS 1
S1A 2
S2A 3
S3A 4
ADG1409
TOP VIEW
(Not to Scale)
12 VDD
11 S1B
10 S2B
9 S3B
Figure 4. ADG1409 Pin Configuration (TSSOP)
NOTES
1. THE EXPOSED PAD IS
CONNECTED INTERNALLY. FOR
INCREASED RELIABILITY OF THE
SOLDER JOINTS AND MAXIMUM
THERMAL CAPABILITY, IT IS
RECOMMENDED THAT THE PAD BE
SOLDERED TO THE SUBSTRATE, VSS.
Figure 5. ADG1409 Pin Configuration (LFCSP)
Table 10. ADG1409 Pin Function Descriptions
Pin No.
TSSOP
LFCSP
Mnemonic Description
1
15 A0
Logic Control Input.
2
16 EN
Active High Digital Input. When low, the device is disabled and all switches are off. When high,
Ax logic inputs determine on switches.
3 1 VSS Most Negative Power Supply Potential. In single supply applications, it can be connected to ground.
4 2 S1A Source Terminal 1A. Can be an input or an output.
5 3 S2A Source Terminal 2A. Can be an input or an output.
6 4 S3A Source Terminal 3A. Can be an input or an output.
7 5 S4A Source Terminal 4A. Can be an input or an output.
8 6 DA Drain Terminal A. Can be an input or an output.
9 7 DB Drain Terminal B. Can be an input or an output.
10 8
S4B Source Terminal 4B. Can be an input or an output.
11 9
S3B Source Terminal 3B. Can be an input or an output.
12 10 S2B Source Terminal 2B. Can be an input or an output.
13 11 S1B Source Terminal 1B. Can be an input or an output.
14 12 VDD Most Positive Power Supply Potential.
15 13 GND Ground (0 V) Reference.
16 14 A1
Logic Control Input.
Not 0
applicable
EPAD
Exposed Pad. The exposed pad is connected internally. For increased reliability of the solder joints
and maximum thermal capability, it is recommended that the pad be soldered to the substrate, VSS.
Table 11. ADG1409 Truth Table
A1 A0
XX
00
01
10
11
EN
0
1
1
1
1
On Switch Pair
None
1
2
3
4
Rev. D | Page 11 of 19
11 Page | ||
| Páginas | Total 19 Páginas | |
| PDF Descargar | [ Datasheet ADG1408.PDF ] | |
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