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PDF ADC12181 Data sheet ( Hoja de datos )
| Número de pieza | ADC12181 | |
| Descripción | 12-Bit/ 10 MHz Self-Calibrating/ Pipelined A/D Converter with Internal Sample & Hold | |
| Fabricantes | National Semiconductor | |
| Logotipo |  |
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November 2002
ADC12181
12-Bit, 10 MHz Self-Calibrating, Pipelined A/D Converter
with Internal Sample & Hold
General Description
The ADC12181 is a monolithic CMOS analog-to-digital con-
verter capable of converting analog input signals into 12-bit
digital words at 10 megasamples per second (MSPS). The
ADC12181 utilizes an innovative pipeline architecture to
minimize die size and power consumption. Self-calibration
and error correction maintain accuracy and performance
over temperature.
The ADC12181 converter operates on a 5V power supply
and can digitize analog input signals in the range of 0 to 2V.
A single convert clock controls the conversion operation. All
digital I/O is TTL compatible.
The ADC12181 is designed to minimize external compo-
nents necessary for the analog input interface. An internal
sample-and-hold circuit samples the analog input and an
internal amplifier buffers the reference voltage input.
The ADC12181 is available in the 32-lead TQFP package
and is designed to operate over the extended commercial
temperature range of -40˚C to +85˚C.
Features
n Single 5V power supply
n Simple analog input interface
n Internal Sample-and-hold
n Internal Reference buffer amplifier
n Low power consumption
Key Specifications
n Resolution
n Conversion Rate
n DNL
n SNR
n ENOB
n Analog Input Range
n Supply Voltage
n Power Consumption, 10 MHz
Applications
n Image processing front end
n PC-based data acquisition
n Scanners
n Fax machines
n Waveform digitizer
12 Bits
10 Msps (min)
±0.4 LSB (typ)
65 dB (typ)
10.4 Bits (typ)
2 Vpp (min)
+5V ±5%
235 mW (typ)
Connection Diagram
Ordering Information
Industrial
(−40˚C ≤ TA ≤ +85˚C)
ADC12181CIVT
© 2002 National Semiconductor Corporation DS101039
10103901
Package
32 pin TQFP
www.national.com
1 page  
Absolute Maximum Ratings (Notes 1,
2)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage
Voltage on Any Output
Input Current at Any Pin (Note 3)
Package Input Current (Note 3)
Package Dissipation
ESD Susceptibility
Human Body Model
Machine Model
Soldering Temp., Infrared, 10
sec.(Note 6)
6.5V
−0.3V to V+ +0.3V
±25mA
±50mA
See (Note 4)
1500V
200V
300˚C
Storage Temp.
Maximum Junction Temp.
Operating Ratings
Operating Temp. Range
Supply Voltage
VD I/O
VREF Input
CLOCK, CAL, PD, OE
|AGND −DGND|
−65˚C to +150˚C
150˚C
−40˚C ≤ TA ≤ +85˚C
+4.75V to +5.25V
+2.7V to VD
1.8V to 2.2V
−0.05V to VD + 0.05V
≤100mV
Converter Electrical Characteristics
The following specifications apply for AGND = DGND = DGND I/O = 0V, VA = VD = VD I/O = +5V, PD = +5V, VREF = +2.0V,
fCLK = 10MHz, CL = 50 pF/pin. After Auto-Cal at Temperature. Boldface limits apply for TA = TJ to TMIN to TMAX: all other
limits TA = TJ = 25˚C (Notes 7, 8) and (Note 9)
Symbol
Parameter
Conditions
Typical
(Note
10)
Limits
(Note
11)
Units
(Limits)
Static Converter Characteristics
Resolution with No Missing Codes
12 Bits(min)
INL Integral Non Linearity
±0.7
±2.1
LSB( max)
DNL
Differential Non Linearity
±0.4
±0.8
LSB( max)
Full-Scale Error
±0.05
±0.24
%FS(max)
Zero Error
±0.15
±0.24
%FS(max)
Dynamic Converter Characteristics
BW Full Power Bandwidth
100 MHz
SNR
Signal-to-Noise Ratio
SINAD Signal-to-Noise & Distortion
ENOB Effective Number of Bits
THD
Total Hamonic Distortion
SFDR Spurious Free Dynamic Range
Reference and Analog Input Characteristics
fin = 5 MHz, VIN = 2.0VP-P
fin = 5 MHz, VIN = 2.0VP-P
fin = 5 MHz, VIN = 2.0VP-P
fin = 5 MHz, VIN = 2.0VP-P
fin = 5 MHz, VIN = 2.0VP-P
65
64.5
10.4
74
73
62
61.5
10
dB
dB
Bits
dB
dB
VIN Input Voltage Range
CIN VIN Input Capacitance
VREF = 2.0V
VIN = 1.0Vdc +
0.7Vrms
(CLK LOW)
(CLK HIGH)
10
15
0
VREF
V(min)
V(max)
pF
pF
VREF
Reference Voltage (Note 14)
1.8 V(min)
2.00
2.2 V(max)
Reference Input Leakage Current
10 µA
Reference Input Resistance
1 MΩ(min)
5 www.national.com
5 Page 
Timing Diagrams
FIGURE 3. Data Output Timing
10103921
11 www.national.com
11 Page | ||
| Páginas | Total 17 Páginas | |
| PDF Descargar | [ Datasheet ADC12181.PDF ] | |
Hoja de datos destacado
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| ADC12181CIVT | 12-Bit/ 10 MHz Self-Calibrating/ Pipelined A/D Converter with Internal Sample & Hold | National Semiconductor |
| ADC12181EVAL | 12-Bit/ 10 MHz Self-Calibrating/ Pipelined A/D Converter with Internal Sample & Hold | National Semiconductor |
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