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ADC12010CIVY fiches techniques PDF

National Semiconductor - 12-Bit/ 10 MSPS/ 160 mW A/D Converter with Internal Sample-and-Hold

Numéro de référence ADC12010CIVY
Description 12-Bit/ 10 MSPS/ 160 mW A/D Converter with Internal Sample-and-Hold
Fabricant National Semiconductor 
Logo National Semiconductor 





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ADC12010CIVY fiche technique
April 2003
ADC12010
12-Bit, 10 MSPS, 160 mW A/D Converter with Internal
Sample-and-Hold
General Description
The ADC12010 is a monolithic CMOS analog-to-digital con-
verter capable of converting analog input signals into 12-bit
digital words at 10 Megasamples per second (MSPS), mini-
mum. This converter uses a differential, pipeline architecture
with digital error correction and an on-chip sample-and-hold
circuit to minimize die size and power consumption while
providing excellent dynamic performance. Operating on a
single 5V power supply, this device consumes just 160 mW
at 10 MSPS, including the reference current. The Power
Down feature reduces power consumption to 25 mW.
The differential inputs provide a full scale input swing equal
to 2VREF with the possibility of a single-ended input. Full use
of the differential input is recommended for optimum perfor-
mance. For ease of use, the buffered, high impedance,
single-ended reference input is converted on-chip to a differ-
ential reference for use by the processing circuitry. Output
data format is 12-bit offset binary.
This device is available in the 32-lead LQFP package and
will operate over the industrial temperature range of −40˚C to
+85˚C.
Features
n Internal sample-and-hold
n Outputs 2.4V to 5V compatible
n TTL/CMOS compatible input/outputs
n Power down mode
n On-chip reference buffer
Key Specifications
n Resolution
n Conversion Rate
n DNL
n INL
n SNR (fIN = 10.1 MHz)
n ENOB (fIN = 10.1 MHz)
n Data Latency
n Supply Voltage
n Power Consumption, 10 MHz
Applications
n Image Processing Front End
n Instrumentation
n PC-Based Data Acquisition
n Fax Machines
n Wireless Local Loops/Cable Modems
n Waveform Digitizers
n DSP Front Ends
12 Bits
10 MSPS (min)
±0.3 LSB (typ)
±0.5 LSB (typ)
70 dB (typ)
11.3 bits (typ)
6 Clock Cycles
+5V ±5%
160 mW (typ)
Connection Diagram
TRI-STATE® is a registered trademark of National Semiconductor Corporation.
© 2003 National Semiconductor Corporation DS200516
20051601
www.national.com

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