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Analog Devices - 110 MSPS Analog Interface for Flat Panel Displays

Numéro de référence AD9883
Description 110 MSPS Analog Interface for Flat Panel Displays
Fabricant Analog Devices 
Logo Analog Devices 





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AD9883 fiche technique
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FEATURES
110 MSPS Maximum Conversion Rate
300 MHz Analog Bandwidth
0.5 V to 1.0 V Analog Input Range
500 ps p-p PLL Clock Jitter at 110 MSPS
3.3 V Power Supply
Full Sync Processing
Sync Detect for ”Hot Plugging”
Midscale Clamping
Power-Down Mode
Low Power: 500 mW Typical
Composite Sync Applications Require an External Coast
APPLICATIONS
RGB Graphics Processing
LCD Monitors and Projectors
Plasma Display Panels
Scan Converters
Microdisplays
Digital TV
110 MSPS Analog Interface for
Flat Panel Displays
AD9883
FUNCTIONAL BLOCK DIAGRAM
RAIN
GAIN
BAIN
HSYNC
COAST
CLAMP
FILT
SCL
SDA
A0
CLAMP
8
A/D
ROUTA
CLAMP
8
A/D
GOUTA
CLAMP
8
A/D
SYNC
PROCESSING
AND CLOCK
GENERATION
SERIAL REGISTER
AND
POWER MANAGEMENT
REF
AD9883
BOUTA
MIDSCV
DTACK
HSOUT
VSOUT
SOGOUT
REF
BYPASS
GENERAL DESCRIPTION
The AD9883 is a complete 8-bit, 110 MSPS monolithic analog
interface optimized for capturing RGB graphics signals from
personal computers and workstations. Its 110 MSPS encode
rate capability and full-power analog bandwidth of 300 MHz
supports resolutions up to SXGA (1280 × 1024 at 60 Hz).
The AD9883 includes a 110 MHz triple ADC with internal
1.25 V reference, a PLL, and programmable gain, offset, and
clamp control. The user provides only a 3.3 V power supply,
analog input, and HSYNC and COAST signals. Three-state
CMOS outputs may be powered from 2.5 V to 3.3 V.
The AD9883’s on-chip PLL generates a pixel clock from HSYNC
and COAST inputs. Pixel clock output frequencies range from
12 MHz to 110 MHz. PLL clock jitter is 500 ps p-p typical at
110 MSPS. When the COAST signal is presented, the PLL
maintains its output frequency in the absence of HSYNC. A
sampling phase adjustment is provided. Data, HSYNC and
Clock output phase relationships are maintained. The AD9883
also offers full sync processing for composite sync and sync-on-
green applications.
A clamp signal is generated internally or may be provided by the
user through the CLAMP input pin. This interface is fully pro-
grammable via a two-wire serial interface.
Fabricated in an advanced CMOS process, the AD9883 is
provided in a space-saving 80-lead LQFP surface mount plastic
package and is specified over the 0°C to 70°C temperature range.
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2001

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