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PDF A29512AL-90 Data sheet ( Hoja de datos )
| Número de pieza | A29512AL-90 | |
| Descripción | 64K X 8 Bit CMOS 5.0 Volt-only/ Uniform Sector Flash Memory | |
| Fabricantes | AMIC Technology | |
| Logotipo |  |
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Preliminary
A29512A Series
64K X 8 Bit CMOS 5.0 Volt-only,
Uniform Sector Flash Memory
Document Title
64K X 8 Bit CMOS 5.0 Volt-only, Uniform Sector Flash Memory
Revision History
Rev. No. History
0.0 Initial issue
Issue Date
August 2, 2002
Remark
Preliminary
PRELIMINARY (August, 2002, Version 0.0)
AMIC Technology, Inc.
1 page  
A29512A Series
Absolute Maximum Ratings*
Ambient Operating Temperature . . . . . -55°C to + 125°C
Storage Temperature . . . . . . . . . . . . . . -65°C to + 125°C
Ground to VCC . . . . . . . . . . . . . . . . . . . . . . -2.0V to 7.0V
Output Voltage (Note 1) . . . . . . . . . . . . . . . -2.0V to 7.0V
A9 & OE (Note 2) . . . . . . . . . . . . . . . . . . . -2.0V to 12.5V
All other pins (Note 1) . . . . . . . . . . . . . . . . . -2.0V to 7.0V
Output Short Circuit Current (Note 3) . . . . . . . . . . 200mA
Notes:
1. Minimum DC voltage on input or I/O pins is -0.5V.
During voltage transitions, inputs may undershoot VSS
to -2.0V for periods of up to 20ns. Maximum DC voltage
on output and I/O pins is VCC +0.5V. During voltage
transitions, outputs may overshoot to VCC +2.0V for
periods up to 20ns.
2. Minimum DC input voltage on A9 pins is -0.5V. During
voltage transitions, A9 and OE may overshoot VSS to -
2.0V for periods of up to 20ns. Maximum DC input
voltage on A9 and OE is +12.5V which may overshoot
to 13.5V for periods up to 20ns.
3. No more than one output is shorted at a time. Duration
of the short circuit should not be greater than one
second.
*Comments
Stresses above those listed under "Absolute Maximum
Ratings" may cause permanent damage to this device.
These are stress ratings only. Functional operation of
this device at these or any other conditions above
those indicated in the operational sections of these
specification is not implied or intended. Exposure to
the absolute maximum rating conditions for extended
periods may affect device reliability.
Operating Ranges
Commercial (C) Devices
Ambient Temperature (TA) . . . . . . . . . . . . . . 0°C to +70°C
VCC Supply Voltages
VCC for ± 10% devices . . . . . . . . . . . . . . +4.5V to +5.5V
Operating ranges define those limits between which the
functionally of the device is guaranteed.
Device Bus Operations
This section describes the requirements and use of the
device bus operations, which are initiated through the
internal command register. The command register itself
does not occupy any addressable memory location. The
register is composed of latches that store the commands,
along with the address and data information needed to
execute the command. The contents of the register serve
as inputs to the internal state machine. The state machine
outputs dictate the function of the device. The appropriate
device bus operations table lists the inputs and control
levels required, and the resulting output. The following
subsections describe each of these operations in further
detail.
Table 1. A29512A Device Bus Operations
Operation
Read
Write
CMOS Standby
TTL Standby
Output Disable
CE
L
L
VCC ± 0.5 V
H
L
OE
L
H
X
X
H
WE
A0 – A15
I/O0 - I/O7
H AIN DOUT
L AIN DIN
X X High-Z
X X High-Z
H X High-Z
Legend:
L = Logic Low = VIL, H = Logic High = VIH, VID = 12.0 ± 0.5V, X = Don't Care, DIN = Data In, DOUT = Data Out, AIN = Address In
PRELIMINARY (August, 2002, Version 0.0)
4
AMIC Technology, Inc.
5 Page 
Figure 2 illustrates the algorithm for the erase operation.
Refer to the Erase/Program Operations tables in the "AC
Characteristics" section for parameters, and to the Sector
Erase Operations Timing diagram for timing waveforms.
Erase Suspend/Erase Resume Commands
The Erase Suspend command allows the system to interrupt
a sector erase operation and then read data from, or program
data to, any sector not selected for erasure. This command is
valid only during the sector erase operation, including the
50µs time-out period during the sector erase command
sequence. The Erase Suspend command is ignored if written
during the chip erase operation or Embedded Program
algorithm. Writing the Erase Suspend command during the
Sector Erase time-out immediately terminates the time-out
period and suspends the erase operation. Addresses are
"don't cares" when writing the Erase Suspend command.
When the Erase Suspend command is written during a
sector erase operation, the device requires a maximum of
20µs to suspend the erase operation. However, when the
Erase Suspend command is written during the sector erase
time-out, the device immediately terminates the time-out
period and suspends the erase operation.
After the erase operation has been suspended, the system
can read array data from or program data to any sector not
selected for erasure. (The device "erase suspends" all
sectors selected for erasure.) Normal read and write timings
and command definitions apply. Reading at any address
within erase-suspended sectors produces status data on I/O7
- I/O0. The system can use I/O7, or I/O6 and I/O2 together, to
determine if a sector is actively erasing or is erase-
suspended. See "Write Operation Status" for information on
these status bits.
After an erase-suspended program operation is complete,
the system can once again read array data within non-
suspended sectors. The system can determine the status of
the program operation using the I/O7 or I/O6 status bits, just
as in the standard program operation. See "Write Operation
Status" for more information.
The system may also write the autoselect command
sequence when the device is in the Erase Suspend mode.
The device allows reading autoselect codes even at
addresses within erasing sectors, since the codes are not
stored in the memory array. When the device exits the
autoselect mode, the device reverts to the Erase Suspend
mode, and is ready for another valid operation. See
"Autoselect Command Sequence" for more information.
The system must write the Erase Resume command
(address bits are "don't care") to exit the erase suspend
mode and continue the sector erase operation. Further writes
of the Resume command are ignored. Another Erase
Suspend command can be written after the device has
resumed erasing.
A29512A Series
START
Write Erase
Command
Sequence
Data Poll
from System
No
Data = FFh ?
Embedded
Erase
algorithm in
progress
Yes
Erasure Completed
Note :
1. See the appropriate Command Definitions table for erase
command sequences.
2. See "I/O3 : Sector Erase Timer" for more information.
Figure 2. Erase Operation
PRELIMINARY (August, 2002, Version 0.0)
10
AMIC Technology, Inc.
11 Page | ||
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