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Intersil Corporation - Radiation Hardened Quad 2-Input AND Gate

Numéro de référence ACS08D
Description Radiation Hardened Quad 2-Input AND Gate
Fabricant Intersil Corporation 
Logo Intersil Corporation 





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ACS08D fiche technique
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ACS08MS
July 1998
Radiation Hardened
Quad 2-Input AND Gate
Features
Description
• QML Qualified Per MIL-PRF-38535 Requirements
• 1.25Micron Radiation Hardened SOS CMOS
• Radiation Environment
- Latch-up Free Under any Conditions
- Total Dose . . . . . . . . . . . . . . . . . . . . . . 3 x 105 RAD(Si)
- SEU Immunity . . . . . . . . . . . <1 x 10-10 Errors/Bit/Day
- SEU LET Threshold . . . . . . . . . . . >100MeV/(mg/cm2)
• Input Logic Levels . . .VIL = (0.3)(VCC), VIH = (0.7)(VCC)
• Output Current . . . . . . . . . . . . . . . . . . . . . . . ±8mA (Min)
• Quiescent Supply Current. . . . . . . . . . . . . 100µA (Max)
• Propagation Delay . . . . . . . . . . . . . . . . . . . . .15ns (Max)
Applications
• High Speed Control Circuits
• Sensor Monitoring
• Low Power Designs
The Radiation Hardened ACS08MS is a Quad 2-Input AND
Gate. For each gate, a HIGH level on both the A and B
inputs results in a HIGH level on the Y output. A LOW level
on either the A or B input results in a LOW level on the Y
output. All inputs are buffered and the outputs are designed
for balanced propagation delay and transition times.
The ACS08MS is fabricated on a CMOS Silicon on
Sapphire (SOS) process, which provides an immunity to
Single Event Latch-up and the capability of highly reliable
performance in any radiation environment. These devices
offer significant power reduction and faster performance
when compared to ALSTTL types.
Specifications for Rad Hard QML devices are controlled
by the Defense Supply Center in Columbus (DSCC). The
SMD numbers listed below must be used when ordering.
Detailed Electrical Specifications for the ACS08 are
contained in SMD 5962-95651. A “hot-link” is provided
on our homepage with instructions for downloading.
www.intersil.com/data/sm/index.asp
Ordering Information
ORDERING NUMBER
INTERNAL MARKETING NUMBER TEMP. RANGE (oC)
PACKAGE
5962F9565101VCC
ACS08DMSR
-55 to 125
14 Ld SBDIP
ACS08D/SAMPLE
ACS08D/SAMPLE
25 14 Ld SBDIP
5962F9565101VXC
ACS08KMSR
-55 to 125
14 Ld Flatpack
ACS08K/SAMPLE
ACS08K/SAMPLE
25 14 Ld Flatpack
5962F9565101V9A
ACS08HMSR
25 Die
Pinouts
ACS08 (SBDIP)
TOP VIEW
ACS08 (FLATPACK)
TOP VIEW
DESIGNATOR
CDIP2-T14
CDIP2-T14
CDFP4-F14
CDFP4-F14
N/A
A1 1
B1 2
Y1 3
A2 4
B2 5
Y2 6
GND 7
14 VCC
13 B4
12 A4
11 Y4
10 B3
9 A3
8 Y3
A1
B1
Y1
A2
B2
Y2
GND
1 14
2 13
3 12
4 11
5 10
69
78
VCC
B4
A4
Y4
B3
A3
Y3
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
1
File Number 3993.1

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