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PDF A62S7308BV-70S Data sheet ( Hoja de datos )
| Número de pieza | A62S7308BV-70S | |
| Descripción | 128K X 8 BIT LOW VOLTAGE CMOS SRAM | |
| Fabricantes | AMIC Technology | |
| Logotipo |  |
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A62S7308B Series
Preliminary
128K X 8 BIT LOW VOLTAGE CMOS SRAM
Document Title
128K X 8 BIT LOW VOLTAGE CMOS SRAM
Revision History
Rev. No.
0.0
0.1
0.2
History
Initial issue
Change max. power supply voltage from 3.3V to 3.6V
Change min. VIH from 2.2V to 2.4V
Add feature “Interfaces directly with 3.3V typ. logic chip”
Remove A62S7308B-10S/SI part
Add A62S7308B-55S/SI part
Change Input Pulse Levels from 0.4V~2.4V to 0V~3.0V in AC Test
Conditions table
Issue Date
September 5, 2000
October 12, 2000
March 9, 2001
Remark
Preliminary
PRELIMINARY (March, 2001, Version 0.2)
AMIC Technology, Inc.
1 page  
A62S7308B Series
DC Electrical Characteristics (continued)
Symbol
Parameter
A62S7308B-55S/70S
Min.
Max.
A62S7308B-55SI/70SI
Min.
Max.
Unit
Conditions
ISB
Standby Power
Supply Current
ISB1
- 0.3
-5
-
-
VOL Output Low Voltage
-
0.4
-
VOH Output High Voltage
2.4
-
2.4
0.3 mA CE1 = VIH or
CE2 = VIL
CE2 ≤ 0.2V,
{10 µA or CE1≥ VCC - 0.2V
CE2 ≥ VCC - 0.2V
0.4 V IOL = 2.1mA
- V IOH = -1.0mA
Truth Table
Mode
Standby
Output Disable
Read
Write
Note: X = H or L
CE1 CE2
HX
XL
LH
LH
LH
OE
X
X
H
L
X
WE
X
X
H
H
L
I/O Operation
High Z
High Z
High Z
DOUT
DIN
Supply Current
ISB, ISB1
ISB, ISB1
ICC, ICC1, ICC2
ICC, ICC1, ICC2
ICC, ICC1, ICC2
Capacitance (TA = 25°C, f = 1.0MHz)
Symbol
Parameter
Min.
CIN* Input Capacitance
CI/O*
Input/Output Capacitance
* These parameters are sampled and not 100% tested.
Max.
6
8
Unit
pF
pF
Conditions
VIN = 0V
VI/O = 0V
PRELIMINARY
(March, 2001, Version 0.2)
4
AMIC Technology, Inc.
5 Page 
AC Test Conditions
Input Pulse Levels
Input Rise and Fall Time
Input and Output Timing Reference Levels
Output Load
0V to 3V
5 ns
1.5V
See Figures 1 and 2
A62S7308B Series
TTL TTL
CL
30pF
CL
5pF
* Including scope and jig.
* Including scope and jig.
Figure 1. Output Load
Figure 2. Output Load for tCLZ1,
tCLZ2, tOHZ, tOLZ, tCHZ1,
tCHZ2, tWHZ, and tOW
Data Retention Characteristics (TA = 0°C to + 70°C or -25°C to 85°C)
Symbol
Parameter
Min. Max. Unit
Conditions
VDR VCC for Data Retention
2.0 3.6
CE2 ≤ 0.2V,
{V or CE1 ≥ VCC - 0.2V,
CE2 ≥ VCC - 0.2V
ICCDR
Data Retention Current
S-Version
SI-Version
-
-
2* VCC = 2.0V, CE2 ≤ 0.2V,
{µA or CE1 ≥ VCC - 0.2V
5** CE2 ≥ VCC - 0.2V
tCDR Chip Disable to Data Retention Time
tR Operation Recovery Time
0 - ns
See Retention Waveform
tRC - ns
* A62S7308B-55S/70S ICCDR: Max. 1µA at TA = 0°C to + 40°C
** A62S7308B-55SI/70SI ICCDR: Max. 1µA at TA = 0°C to + 40°C
PRELIMINARY
(March, 2001, Version 0.2)
10
AMIC Technology, Inc.
11 Page | ||
| Páginas | Total 17 Páginas | |
| PDF Descargar | [ Datasheet A62S7308BV-70S.PDF ] | |
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