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دیتاشیت - Aeroflex Circuit Technology - ACT-F128K32 High Speed 4 Megabit FLASH Multichip Module

شماره قطعه ACT-F128K32N-070F5T
شرح مفصل ACT-F128K32 High Speed 4 Megabit FLASH Multichip Module
تولید کننده Aeroflex Circuit Technology 
آرم Aeroflex Circuit Technology 


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ACT-F128K32N-070F5T شرح
ACT–F128K32 High Speed
4 Megabit FLASH Multichip Module
Features
CIRCUIT TECHNOLOGY
www.aeroflex.com
s 4 Low Power 128K x 8 FLASH Die in One MCM
Package
s Organized as 128K x 32
q User Configurable to 256K x 16 or 512K x 8
q Upgradable to 512K x 32 in same Package Style
s Access Times of 60, 70, 90, 120 and 150ns
s +5V Programing, 5V ±10% Supply
s 100,000 Erase/Program Cycles Typical, 0°C to +70°C
s Low Standby Current
s TTL Compatible Inputs and CMOS Outputs
s Embedded Erase and Program Algorithms
s Page Program Operation and Internal Program
Control Time
s Commercial, Industrial and Military Temperature
Ranges
s MIL-PRF-38534 Compliant MCMs Available
s Industry Standard Pinouts
s Packaging – Hermetic Ceramic
q 68 Lead, .88" x .88" x .160" Single-Cavity Small
Outline gull wing, Aeroflex code# "F5" (Drops into
the 68 Lead JEDEC .99"SQ CQFJ footprint)
q 66 Pin, 1.08" x 1.08" x .160" PGA Type, No
Shoulder, Aeroflex code# "P3"
q 66 Pin, 1.08" x 1.08" x .185" PGA Type, With
Shoulder, Aeroflex code# "P7"
s Sector Architecture (Each Die)
q 8 Equal size sectors of 64K bytes each
q Any Combination of Sectors can be erased with
one command sequence
q Supports Full Chip Erase
s DESC SMD# 5962–94716 Released (P3,P7,F5)
Block Diagram – PGA Type Package(P3,P7) & CQFP(F5)
WE1 CE1 WE2 CE2 WE3 CE3 WE4 CE4
OE
A0–A16
128Kx8 128Kx8 128Kx8 128Kx8
8
I/O0-7
88
8
I/O8-15 I/O16-23 I/O24-31
Pin Description
I/O0-31 Data I/O
A0–16 Address Inputs
WE1-4 Write Enables
CE1-4 Chip Enables
OE Output Enable
VCC Power Supply
GND
Ground
NC Not Connected
General Description
The ACT–F128K32 is a high
speed, 4 megabit CMOS flash
multichip module (MCM)
designed for full temperature
range military, space, or high
reliability applications.
The MCM can be organized
as a 128K x 32 bits, 256K x 16
bits or 512K x 8 bits device and
is input TTL and output CMOS
compatible. The command
register is written by bringing
WE to a logic low level (VIL),
while CE is low and OE is at
logic high level (VIH). Reading is
accomplished by chip Enable
(CE) and Output Enable (OE)
being logically active, see
Figure 9. Access time grades of
60ns, 70ns, 90ns, 120ns and
150ns maximum are standard.
The ACT–F128K32 is
packaged in a hermetically
eroflex Circuit Technology - Advanced Multichip Modules © SCD1667 REV A 4/28/98

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