PDF ACT-D1M96S-020F20M Data sheet ( Hoja de datos )

Número de pieza	ACT-D1M96S-020F20M
Descripción	ACT-D1M96S High Speed 96 MegaBit 3.3V Synchronous DRAM Multichip Module
Fabricantes	Aeroflex Circuit Technology
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No Preview Available ! ACT-D1M96S High Speed 96 MegaBit 3.3V Synchronous DRAM Multichip Module Features I 6 Low Power Micron 1M X 16 Synchronous Dynamic Random Access Memory Chips in one MCM I User Configureable as "2" Independent 512K X 48 X 2 Banks I High-Speed, Low-Noise, Low-Voltage TTL (LVTTL) Interface I 3.3-V Power Supply (±10% Tolerance) I Separate Logic and Output Driver Power Pins I Two Banks for On-Chip Interleaving (Gapless Accesses) I Up to 50-MHz Data Rates I CAS Latency (CL) Programmable to 2 Cycles From Column-Address Entry I Burst Length Programmable to 4 or 8 I Pipeline Architecture I Cycle-by-Cycle DQ-Bus Write Mask Capability With Upper and Lower Byte Control I Chip Select and Clock Enable for Enhanced-System Interfacing I Serial Burst Sequence I Auto-Refresh I 4K Refresh (Total for Both Banks) I 200-lead CQFP, cavity-up package General Description The ACT-D1M96S device is a high-speed 96Mbit synchronous dynamic random access memory (SDRAM) organized as 2 independent 512K X 48 X 2 banks. All inputs and outputs of the ACT-D1M96S are compatible with the LVTTL interface. All inputs and outputs are synchronized with the CLK input to simplify system design and enhance use with high-speed microprocessors and caches. BLOCK DIAGRAM CS1 CLK1 S CKE1 E DQMU1 C DQML1 T RAS1 CAS1 I WE1 O A0-A11 12 N A BANK T BANK B CS2 CLK2 S CKE2 E DQMU2 DQML2 C RAS2 T CAS2 I WE2 O BA0-BA11 12 N B BANK T BANK B 1M X 16 or 512K X 16 X 2 Banks 16 DQ0-15 1M X 16 or 512K X 16 X 2 Banks 16 DQ48-63 1M X 16 or 512K X 16 X 2 Banks 16 DQ16-31 1M X 16 or 512K X 16 X 2 Banks 16 DQ64-79 1M X 16 or 512K X 16 X 2 Banks 16 DQ32-47 1M X 16 or 512K X 16 X 2 Banks 16 DQ80-95 eroflex Circuit Technology - Advanced Multichip Modules © SCD3369-1 REV C 5/31/00 1 page A11 BA11 A10 BA10 A9 BA9 A8 BA8 A7 BA7 A6 BA6 A5 BA5 A4 BA4 A3 BA3 A2 BA2 A1 BA1 A0 BA0 Reserved 00 0 = Serial Register Bit A9/ BA9 Write Burst Length A2 - A0 0 BA2 - BA0 Register Bits† A6 A5 A4 CAS Latency BA6 BA5 BA4 010 2 Register Bits† A2 A1 A0 BA2 BA1 BA0 Burst Length 010 011 4 8 NOTES: † All other combinations are reserved. Figure 1 – Mode Register Programming Output 3.3 V 1200 Ω 10 pF 870 Ω AC Test Conditions Parameter Input Pulse Level Input Rise and Fall Input and Output Timing Reference Typical 0.4 – 2.4 5 1.5 Units V ns V Figure 2 – LVTTL-Load Circuit Aeroflex Circuit Technology 5 SCD3369-1 REV C 5/31/00 Plainview NY (516) 694-6700 5 Page CLK tCK tCH tCL tT DQ, A0-A11, CS, RAS, CAS, WE, DQMx, CKE DQ, A0-A11, CS, RAS, CAS, WE, DQMx, CKE tiS tT tiS, tCESP tT tiH tiH Figure 3 – Input-Attribute Parameters CLK ACTV Command READ Command DQ CAS latency tAC tLZ tOH Figure 4 – Output Parameters tT tHZ DESL ACTV ACTV, REFR ACTV DEAC, DCAB ACTV MRS nCDD tRAS tRC tRCD tRP tRRD tRSA Command Disable DEAC, DCAB ACTV (same bank), MRS, REFR READ, READ-P, WRT, WRT-P ACTV, MRS, REFR ACTV (Different Bank) ACTV, MRS, REFR Aeroflex Circuit Technology Figure 5 – Command-to-Command Parameters 11 SCD3369-1 REV C 5/31/00 Plainview NY (516) 694-6700 11 Page

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Hoja de datos destacado

Número de pieza	Descripción	Fabricantes
ACT-D1M96S-020F20C	ACT-D1M96S High Speed 96 MegaBit 3.3V Synchronous DRAM Multichip Module	Aeroflex Circuit Technology
ACT-D1M96S-020F20I	ACT-D1M96S High Speed 96 MegaBit 3.3V Synchronous DRAM Multichip Module	Aeroflex Circuit Technology
ACT-D1M96S-020F20M	ACT-D1M96S High Speed 96 MegaBit 3.3V Synchronous DRAM Multichip Module	Aeroflex Circuit Technology
ACT-D1M96S-020F20Q	ACT-D1M96S High Speed 96 MegaBit 3.3V Synchronous DRAM Multichip Module	Aeroflex Circuit Technology

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