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PDF AD1981A Data sheet ( Hoja de datos )
| Número de pieza | AD1981A | |
| Descripción | AC 97 SoundMAX Codec | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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a
AC ‘97 SoundMAX® Codec
AD1981A
AC ’97 2.2-COMPLIANT CODEC
FEATURES
S/PDIF Output, 20 Bits Data Format, Supporting
48 kHz and 44.1 kHz Sample Rates
Integrated Stereo Headphone Amplifier
Variable Sample Rate Audio
External Audio Power-Down Control
Greater than 90 dB Dynamic Range
16-Bit Stereo Full-Duplex Codec
20-Bit DAC Input
Three Analog Line-Level Stereo Inputs for
LINE-IN, AUX, and CD
Mono Line-Level Phone Input
Mono MIC Input with Built-In Programmable Preamp
High Quality CD Input with Ground Sense
Mono Output for Speakerphone or Internal Speaker
Power Management Support
48-Lead LQFP Package
ENHANCED FEATURES
Built-in Digital Equalizer Function for Optimized
Speaker Sound
Full Duplex Variable Sample Rates from 7040 Hz to 48 kHz
with 1 Hz Resolution
Jack Sense Pins Provide Automatic Output Switching
Software-Programmed VREFOUT Output for Microphone
Bias and External Power Amp
Split Power Supplies: 3.3 V Digital and 5 V Analog
Multiple Codec Configuration Options
MIC_IN
AUX
PHONE_IN
CD_L
CD_GND
CD_R
LINE_IN
HP_OUT_L
LINE_OUT_L
MONO_OUT
LINE_OUT_R
HP_OUT_R
AD1981A
MIC PREAMP
G
CD
DIFF AMP
HP M
A
MA
MA
MA
HP M
A
FUNCTIONAL BLOCK DIAGRAM
VREF
VREFOUT
XTL_OUT XTL_IN ID1 ID0
GA
GA
M
M
GA GA
GA GA GA
MM
MMM
GA
M
M
M
VREF G
XTAL OSCILLATOR LINK PORT/
ID SELECT
A/D SAMPLE RATE
GENERATOR
PLL CLOCK
GENERATOR
GM
16-BIT ⌺-⌬ A/D
CONVERTER
GM
16-BIT ⌺-⌬ A/D
CONVERTER
GM
GM
M GA
M GA
16-BIT ⌺-⌬ A/D
CONVERTER
D/A SAMPLE RATE
GENERATOR
16-BIT ⌺-⌬ A/D
CONVERTER
20-BIT ⌺-⌬ D/A
CONVERTER
SPKR
EQ
20-BIT ⌺-⌬ D/A
CONVERTER
SPKR
EQ
EQ COEFF STORAGE
ANALOG
MUTE
CONTROL
LOGIC
AC ’97 CONTROL REGISTERS
JACK SENSE
EAPD
SPDIF
KEY:
G = GAIN
A = ATTENUATE
M = MUTE
SoundMAX is a registered trademark of Analog Devices, Inc.
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
JS0 JS1
EAPD
SPDIF
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2002
1 page  
AD1981A
ABSOLUTE MAXIMUM RATINGS*
(TA = 25°C unless otherwise noted.)
Power Supplies
Digital (DVDD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +3.6 V
Analog (AVDD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +6.0 V
Input Current (except Supply Pins) . . . . . . . . . . . . . . . ± 10 mA
Signals Pins
Digital Input Voltage . . . . . . . . . . . . . –0.3 V to DVDD +0.3 V
Analog Input Voltage . . . . . . . . . . . . –0.3 V to AVDD +0.3 V
Ambient Temperature Range (Operating) . . . . . . . 0°C to 70°C
Ambient Temperature Rating (TQFP Package)
TAMB = TCASE – ( PD ϫ CA )
TCASE = Case Temperature in °C
PD = Power Dissipation in W
JA Thermal Resistance (Junction-to-Ambient) . . . 76.2°C/W
JC Thermal Resistance (Junction-to-Case) . . . . . . . 17°C/W
JA Thermal Resistance (Case-to-Ambient) . . . . . 52.2°C/W
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
*Stresses greater than those listed under Absolute Maximum Ratings may cause
permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in
the operational section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
Model
AD1981AJST
*ST = Thin Quad Flatpack
ORDERING GUIDE
Temperature
Range
Package
Description
0°C to 70°C
48-Lead LQFP
Package
Option*
ST-48
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the AD1981A features proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
REV. 0
–5–
5 Page 
PHV[4:0]
PHM
AD1981A
Phone Volume: Allows setting the phone volume attenuator in 32 volume levels. The LSB represents 1.5 dB, and
the range is +12 dB to –34.5 dB. The default value is 0 dB with mute bit enabled.
Phone Mute: When this bit is set to “1,” the phone channel is muted.
Mic Volume (Index 0Eh)
Reg Num Name
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Default
0Eh Mic Volume MCM X X X X X X X X M20 X MCV4 MCV3 MCV2 MCV1 MCV0 8008h
MCV[4:0]
M20
MCM
MIC Volume Gain: Allows setting the mic volume attenuator in 32 volume levels. The LSB represents 1.5 dB, and
the range is +12 dB to –34.5 dB. The default value is 0 dB with mute enabled.
MIC Gain Boost: This bit allows setting additional MIC gain to increase the microphone sensitivity.
The nominal gain boost by default is 20 dB; however, bits D0 and D1 (MBG[1:0]) on the miscellaneous control
bits register (76h) allow changing the gain boost to 10 dB or 30 dB if necessary.
0 = Disabled; Gain = 0 dB
1 = Enabled; Default Gain = 20 dB (see Register 76h, bits D0, D1)
MIC Mute: When this bit is set to “1,” the MIC channel is muted.
Line In Volume (Index 10h)
Reg Num Name
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Default
10h Line In Volume LM X X LLV4 LLV3 LLV2 LLV1 LLV0 RM* X X RLV4 RLV3 RLV2 RLV1 RLV0 8808h
*For AC ‘97 compatibility, Bit D7 (RM) is only available by setting the MSPLT bit Register 76h. The MSPLT bit enables separate mute bits for the left and right
channels. If MSPLT is not set, RM bit has no effect.
RLV[4:0]
RM
LLV[4:0]
LM
Line In Volume Right: Allows setting the line in right channel attenuator in 32 volume levels. The LSB represents
1.5 dB, and the range is +12 dB to –34.5 dB. The default value is 0 dB, mute enabled.
Right Channel Mute: Once enabled by the MSPLT Bit in Register 76h, this bit mutes the right channel separately
from the LM bit. Otherwise, this bit will always read “0” and will have no effect when set to “1.”
Line In Volume Left: Allows setting the line in left channel attenuator in 32 volume levels. The LSB represents
1.5 dB, and the range is +12 dB to –34.5 dB. The default value is 0 dB, mute enabled.
Line In Mute: When this bit is set to “1,” both L/R channels are muted unless the MSPLT Bit in Register 76h is
set to “1,” in which case this mute bit will only affect the left channel.
CD Volume (Index 12h)
Reg Num Name
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Default
12h CD Volume CM X X LCV4 LCV3 LCV2 LCV1 LCV0 RM* X X RCV4 RCV3 RCV2 RCV1 RCV0 8808h
*For AC ‘97 compatibility, Bit D7 (RM) is only available by setting the MSPLT bit Register 76h. The MSPLT bit enables separate mute bits for the left and right
channels. If MSPLT is not set, RM bit has no effect.
RCV[4:0]
RM
LCV[4:0]
CM
Right CD Volume: Allows setting the CD right channel attenuator in 32 volume levels. The LSB represents 1.5 dB,
and the range is +12 dB to –34.5 dB. The default value is 0 dB, mute enabled.
Right Channel Mute: Once enabled by the MSPLT Bit in Register 76h, this bit mutes the right channel separately
from the CM bit. Otherwise, this bit will always read “0” and will have no effect when set to “1.”
Left CD Volume: Allows setting the CD left channel attenuator in 32 volume levels. The LSB represents 1.5 dB,
and the range is +12 dB to –34.5 dB. The default value is 0 dB, mute enabled.
CD Volume Mute: When this bit is set to “1,” both L/R channels are muted, unless the MSPLT Bit in Register 76h
is set to “1,” in which case, this mute bit will only affect the left channel.
REV. 0
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11 Page | ||
| Páginas | Total 24 Páginas | |
| PDF Descargar | [ Datasheet AD1981A.PDF ] | |
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