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PDF AD1852 Data sheet ( Hoja de datos )

Número de pieza AD1852
Descripción Stereo/ 24-Bit/ 192 kHz Multibit DAC
Fabricantes Analog Devices 
Logotipo Analog Devices Logotipo



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a
Stereo, 24-Bit, 192 kHz
Multibit Σ∆ DAC
AD1852*
FEATURES
5 V Stereo Audio DAC System
Accepts 16-Bit/18-Bit/20-Bit/24-Bit Data
Supports 24 Bits, 192 kHz Sample Rate
Accepts a Wide Range of Sample Rates Including:
32 kHz, 44.1 kHz, 48 kHz, 88.2 kHz, 96 kHz, and
192 kHz
Multibit Sigma-Delta Modulator with “Perfect
Differential Linearity Restoration” for Reduced Idle
Tones and Noise Floor
Data-Directed Scrambling DAC—Least Sensitive to
Jitter
Differential Output for Optimum Performance
117 dB Signal-to-Noise (Not Muted) at 48 kHz Sample
Rate (A-Weighted Mono)
114 dB Signal-to-Noise (Not Muted) at 48 kHz Sample
Rate (A-Weighted Stereo)
117 dB Dynamic Range (Not Muted) at 48 kHz Sample
Rate (A-Weighted Mono)
114 dB Dynamic Range (Not Muted) at 48 kHz Sample
Rate (A-Weighted Stereo)
–105 dB THD+N (Mono Application Circuit)
–102 dB THD+N (Stereo)
115 dB Stopband Attenuation
On-Chip Clickless Volume Control
Hardware and Software Controllable Clickless Mute
Serial (SPI) Control for: Serial Mode, Number of Bits,
Sample Rate, Volume, Mute, De-Emp
Digital De-Emphasis Processing for 32 kHz, 44.1 kHz,
48 kHz Sample Rates
Clock Autodivide Circuit Supports Five Master-Clock
Frequencies
Flexible Serial Data Port with Right-Justified, Left-
Justified, I2S-Compatible and DSP Serial Port Modes
28-Lead SSOP Plastic Package
APPLICATIONS
Hi End: DVD, CD, Home Theater Systems, Automotive
Audio Systems, Sampling Musical Keyboards, Digital
Mixing Consoles, Digital Audio Effects Processors
PRODUCT OVERVIEW
The AD1852 is a complete high performance single-chip stereo
digital audio playback system. It is comprised of a multibit sigma-
delta modulator, digital interpolation filters, and analog output
drive circuitry. Other features include an on-chip stereo attenuator
and mute, programmed through an SPI-compatible serial control
port. The AD1852 is fully compatible with all known DVD
formats including 192 kHz as well as 96 kHz sample frequen-
cies and 24 bits. It also is backwards compatible by supporting
50 µs/15 µs digital de-emphasis intended for “Redbook” compact
discs, as well as de-emphasis at 32 kHz and 48 kHz sample rate.
The AD1852 has a very simple but very flexible serial data input
port that allows for glueless interconnection to a variety of ADCs,
DSP chips, AES/EBU receivers and sample rate converters. The
AD1852 can be configured in left-justified, I2S, right-justified,
or DSP serial port compatible modes. It can support 16, 18, 20,
and 24 bits in all modes. The AD1852 accepts serial audio data
in MSB first, twos-complement format. The AD1852 oper-
ates from a single 5 V power supply. It is fabricated on a single
monolithic integrated circuit and is housed in a 28-lead SSOP
package for operation over the temperature range 0°C to 70°C.
FUNCTIONAL BLOCK DIAGRAM
CONTROL DATA
VOLUME INPUT
MUTE
3
DIGITAL
SUPPLY
2
CLOCK
IN
16-/18-/20-/24-BIT
DIGITAL
DATA INPUT
SERIAL 2
MODE
AD1852
SERIAL CONTROL
INTERFACE
VOLTAGE
REFERENCE
SERIAL
DATA
INTERFACE
ATTEN/
MUTE
ATTEN/
MUTE
8 ؋ FS
INTERPOLATOR
8 ؋ FS
INTERPOLATION
MULTIBIT SIGMA-
DELTA MODULATOR
MULTIBIT SIGMA-
DELTA MODULATOR
DAC
DAC
AUTO-CLOCK
DIVIDE CIRCUIT
ANALOG
OUTPUTS
*Patents Pending
RESET
MUTE
DE-EMPHASIS
2
ANALOG
SUPPLY
2
ZERO
FLAG
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2000

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AD1852 pdf
Pin Input/Output Pin Name
1I
2I
DGND
MCLK
3I
4I
CLATCH
CCLK
5I
CDATA
6
7I
8O
NC
192/48
ZEROR
9I
DEEMP
10
11, 15
12
13
14
I
I
O
O
O
16 O
17 O
18 I
19
20 I
21 I
22 O
23 I
24 I
25 I
26 I
27 I
28 I
96/48
AGND
OUTR+
OUTR–
FILTR
OUTL–
OUTL+
AVDD
FILTB
IDPM1
IDPM0
ZEROL
MUTE
RESET
L/RCLK
BCLK
SDATA
DVDD
AD1852
PIN FUNCTION DESCRIPTIONS
Description
Digital Ground.
Master Clock Input. Connect to an external clock source at either 256 FS, 384 FS,
512 FS, 768 FS, or 1024 FS.
Latch Input for Control Data. This input is rising-edge sensitive.
Control Clock Input for Control Data. Control input data must be valid on the rising
edge of CCLK. CCLK may be continuous or gated.
Serial Control Input, MSB first, containing 16 bits of unsigned data per channel. Used
for specifying channel-specific attenuation and mute.
No Connect.
Selects 48 kHz (LO) or 192 kHz Sample Frequency.
Right Channel Zero Flag Output. This pin goes HI when Right Channel has no signal
input for more than 1024 LR Clock Cycles.
De-Emphasis. Digital de-emphasis is enabled when this input signal is HI. This is used
to impose a 50 µs/15 µs response characteristic on the output audio spectrum at an
assumed 44.1 kHz sample rate. Curves for 32 kHz and 48 kHz sample rates may be
selected via SPI control register.
Selects 48 kHz (LO) or 96 kHz Sample Frequency.
Analog Ground.
Right Channel Positive Line Level Analog Output.
Right Channel Negative Line Level Analog Output.
Voltage Reference Filter Capacitor Connection. Bypass and decouple the voltage refer-
ence with parallel 10 µF and 0.1 µF capacitors to the AGND.
Left Channel Negative Line Level Analog Output.
Left Channel Positive Line Level Analog Output.
Analog Power Supply. Connect to Analog 5 V Supply.
Filter Capacitor Connection. Connect 10 µF capacitor to AGND (Pin 15).
Input Serial Data Port Mode Control One. With IDPM0, defines 1 of 4 serial modes.
Input Serial Data Port Mode Control Zero. With IDPM1, defines 1 of 4 serial modes.
Left Channel Zero Flag Output. This pin goes HI when Left Channel has no signal
input for more than 1024 LR Clock Cycles.
Mute. Assert HI to mute both stereo analog outputs. Deassert LO for normal operation.
Reset. The AD1852 is reset on the rising edge of this signal. The serial control port
registers are reset to the default values. Connect HI for normal operation.
Left/Right Clock Input for Input Data. Must run continuously.
Bit Clock Input for Input Data. Need not run continuously; may be gated or used in a
burst fashion.
Serial Input, MSB first, containing two channels of 16, 18, 20, and 24 bits of twos
complement data per channel.
Digital Power Supply Connect to digital 5 V supply.
Table I. Serial Data Input Mode
IDPM1 (Pin 20) IDPM0 (Pin 21) Serial Data Input Format
0 0 Right-Justified
0 1 I2S-Compatible
1 0 Left-Justified
1 1 DSP
REV. 0
–5–

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AD1852 arduino
Typical Performance Characteristics– AD1852
Figures 9–14 show the calculated frequency response of the
digital interpolation filters. Figures 15–26 show the performance
of the AD1852 as measured by an Audio Precision System 2
Cascade. For the wideband plots, the noise floor shown in the
plots is higher than the actual noise floor of the AD1852. This is
caused by the higher noise floor of the “High Bandwidth” ADC
used in the Audio Precision measurement system. The two-tone
test shown in Figure 17 is per the SMPTE standard for measur-
ing Intermodulation Distortion.
0.001
0.0008
0.0006
0.0004
0.0002
0
–0.0002
–0.0004
–0.0006
–0.0008
–0.001
02
4 6 8 10 12 14 16 18 20
FREQUENCY – kHz
Figure 9. Passband Response 8× Mode, 48 kHz Sample
Rate
0.5
0.4
0.3
0.2
0.1
0
–0.1
–0.2
–0.3
–0.4
–0.5
–10 5
10 15 20 25 30 35 40
FREQUENCY – kHz
Figure 10. 44 kHz Passband Response 4× Mode, 96 kHz
Sample Rate
2.0
1.5
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
0
10 20 30 40 50 60 70 80
FREQUENCY – kHz
Figure 11. 88 kHz Passband Response 2× Mode, 192 kHz
Sample Rate
0
–20
–40
–60
–80
–100
–120
–140
–160
0
50 100 150 200 250 300 350
FREQUENCY – kHz
Figure 12. Complete Response, 8× Mode, 48 kHz
Sample Rate
0
–20
–40
–60
–80
–100
–120
–140
–160
0
50 100 150 200 250 300
FREQUENCY – kHz
Figure 13. Complete Response, 4× Mode, 96 kHz
Sample Rate
0
–20
–40
–60
–80
–100
–120
–140
–160
0
50 100 150 200 250
FREQUENCY – kHz
Figure 14. Complete Response, 2× Mode, 192 kHz
Sample Rate
REV. 0
–11–

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