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PDF ACT15530CFI Data sheet ( Hoja de datos )
| Número de pieza | ACT15530CFI | |
| Descripción | CMOS Manchester Encoder / Decoder | |
| Fabricantes | Aeroflex Circuit Technology | |
| Logotipo |  |
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ACT15530
CMOS Manchester Encoder / Decoder
Features
• MIL-STD-1553 Compatible
• 1.25 Megabit/sec Maximum Data Rate
CIRCUIT TECHNOLOGY
www.aeroflex.com
• Sync Identification and Lock-in
• Clock Recovery
• Manchester II Encode / Decode
• Separate Encoder and Decoder Sections
• Low Operating Power
• Military Temperature Range -55°C to +125°C
• Monolithic – Single Chip – Construction
Valid Word 1
Encoder Shift Clock 2
Take Data 3
Serial Data Out 4
Decoder Clock 5
Bipolar Zero In 6
Bipolar One In 7
Unipolar Data In 8
Decoder Shift Clock 9
Command/Data Sync 10
Decoder Reset 11
VSS 12
24 VDD
23 Encoder Clock
22 Send Clock In
21 Send Data
20 Sync Select
19 Encoder Enable
18 Serial Data In
17 Bipolar One Out
16 Output Inhibit
15 Bipolar Zero Out
14 ÷ 6 Out
13 Master Reset
Figure 1: Pin Assignments
(24-Pin DIP/Flat Package – See Figure 18 for LCC Pkg)
• Available in Commercial and Industrial Temperature Ranges
• Several Package and Quality Options (Consult Factory for Details)
• Direct Replacement for the Obsolete Harris HD15530-9/-2/8 and GEC Plessey Marconi
MA15530 / MAS15530 parts
1
General Description
The ACT15530 is a high performance CMOS integrated circuit used to implement MIL-STD-1553 and
similar Manchester II encoded, time division multiplexed, serial data protocols. The device is divided into
two independent sections, encoder and decoder, with a common master reset. The function of the encoder
section is to produce the sync pulse and parity bit, and encode the data bits. The decoder section recognizes
the sync pulse, decodes the data bits and checks for parity.
The ACT15530 is fully guaranteed to support the 1 MHz data rate of MIL-STD-1553 over the full
temperature and supply voltage ranges. The device interfaces with CMOS, TTL or N-Channel support
circuitry and operates from a standard 5 volt supply. The circuit can also be used in many party line digital
data communications applications where high reliability command and control signals are required. Using
Aeroflex transceivers products (4400 Series) the Bit Error Rates (BER) and Word Error Rates (WER) of
MIL-STD-1553 can be achieved (Refer to MIL-STD-1553 Multiplex Applications Handbook
"MIL-HDBK-1553").
eroflex Circuit Technology – Data Bus Modules For The Future © SCD15330 REV B 7/28/99
1 page  
AC Characteristics
Sym
Parameter
Limits
Min Max Units
fEC Encoder clock frequency
0
15 MHz
fESC Send clock frequency
0 2.5 MHz
tECR Encoder clock rise time - 8 ns
tECF Encoder clock fall time
- 8 ns
fED Data rate
0
1.25
MHz
tMR Master reset pulse width
150
-
ns
tE1 Shift clock delay
- 125 ns
tE2 Serial data setup time
75 - ns
tE3 Serial data hold time
75 - ns
tE4 Enable setup time
90 - ns
tE5 Enable pulse width
100 -
ns
tE6 Sync setup time
55 - ns
tE7 Sync pulse width
150 -
ns
tE8 Send data delay
0 50 ns
tE9 Bipolar output delay
- 130 ns
1. VDD = 5V ±10%, over full operating temperature range. 2. CL=50pF.
Figure 7: Encoder Electrical
Characteristics
Sym
Parameter
Limits
Min Typ Max
fDC Decoder clock frequency
0
- 15
tDCR Decoder clock rise time
-
-
8
tDCF Decoder clock fall time - - 8
fDD Data rate
0 - 1.25
tDR Decoder reset pulse width 150
-
-
tDRS Decoder reset setup time
75
-
-
tMR Master reset pulse width
150
-
-
tD1 Bipolar data pulse width tDC + 10
-
-
tD2 Sync transition span
- 18tDC -
tD3 One-Zero overlap
- - tDC - 10
tD4 Short data transition span
-
6tDC
-
tD5 Long data transition span - 12tDC -
tD6 Sync delay (on)
-20 - 110
tD7 Take data delay (on)
0 - 110
tD8 Serial data out delay
- - 80
tD9 Sync delay (off)
0 - 110
tD10 Take data delay (off)
0 - 110
tD11 Valid word delay
0 - 110
1. VDD = 5V ±10%, over full operating temperature range. 2. CL=50pF.
3. tDC = Decoder clock period = 1/fDC
Units
MHz
MHz
ns
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Figure 8: Decoder Electrical
Characteristics
Aeroflex Circuit Technology
5 SCD15530 REV B 7/28/99 Plainview NY (516) 694-6700
5 Page 
Command Sync
Data Sync
Bit
Period
Logical One Data
Logical Zero Data
Bit
Period
Figure 14: Character Formats
Bit
Period
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
Command Word (From Controller to Terminal)
5 15
51
Sync
Terminal
Address
Subaddress
R/T Mode
Data Word (Sent Either Direction)
16
Data Word
Count
P
1
Sync
Data Word
Status Word (From Terminal to Controller)
51
9
Sync
Terminal
Address ME Code for Failure Modes
P
11
TF P
Aeroflex Circuit Technology
Figure 15: Word Formats
11
SCD15530 REV B 7/28/99 Plainview NY (516) 694-6700
11 Page | ||
| Páginas | Total 15 Páginas | |
| PDF Descargar | [ Datasheet ACT15530CFI.PDF ] | |
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