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PDF AD539 Data sheet ( Hoja de datos )
| Número de pieza | AD539 | |
| Descripción | Wideband Dual-Channel Linear Multiplier/Divider | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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FEATURES
2-quadrant multiplication/division
2 independent signal channels
Signal bandwidth of 60 MHz (IOUT)
Linear control channel bandwidth of 5 MHz
Low distortion (to 0.01%)
Fully calibrated, monolithic circuit
APPLICATIONS
Precise high bandwidth AGC and VCA systems
Voltage-controlled filters
Video signal processing
High speed analog division
Automatic signal-leveling
Square-law gain/loss control
GENERAL DESCRIPTION
The AD539 is a low distortion analog multiplier having two
identical signal channels (Y1 and Y2), with a common X input
providing linear control of gain. Excellent ac characteristics up
to video frequencies and a −3 dB bandwidth of over 60 MHz are
provided. Although intended primarily for applications where
speed is important, the circuit exhibits good static accuracy in
computational applications. Scaling is accurately determined by
a band-gap voltage reference and all critical parameters are
laser-trimmed during manufacture.
The full bandwidth can be realized over most of the gain range
using the AD539 with simple resistive loads of up to 100 Ω.
Output voltage is restricted to a few hundred millivolts under
these conditions.
The two channels provide flexibility. In single-channel applications,
they can be used in parallel to double the output current, in
series to achieve a square-law gain function with a control range of
over 100 dB, or differentially to reduce distortion. Alternatively,
Wideband Dual-Channel
Linear Multiplier/Divider
AD539
FUNCTIONAL BLOCK DIAGRAM
AD539 6kΩ
W1
×VY1
CHAN1 OUTPUT
6kΩ
Z1
VX
×VY2
6kΩ
Z2
CHAN2 OUTPUT
6kΩ
W2
Figure 1.
they can be used independently, as in audio stereo applications,
with low crosstalk between channels. Voltage-controlled filters
and oscillators using the state-variable approach are easily
designed, taking advantage of the dual channels and common
control. The AD539 can also be configured as a divider with
signal bandwidths up to 15 MHz.
Power consumption is only 135 mW using the recommended
±5 V supplies. The AD539 is available in three versions: the J
and K grades are specified for 0 to 70°C operation and S grade is
guaranteed over the extended range of −55°C to +125°C. The J and
K grades are available in either a hermetic ceramic SBDIP (D-16)
or a low cost PDIP (N-16), whereas the S grade is available in
ceramic SBDIP (D-16) or LCC (E-20-1). The S grade is availa-
ble in MIL-STD-883 and Standard Military Drawing (DESC)
Number 5962-8980901EA versions.
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©1983–2011 Analog Devices, Inc. All rights reserved.
1 page  
AD539
Parameter
CONTROL INPUT, VX
Nominal Full-Scale Input
Operational Range, Degraded
Performance
Input Resistance2
Offset Voltage
TMIN to TMAX
Power Supply Sensitivity
Gain
Absolute Gain Error
TMIN to TMAX
CURRENT OUTPUT2
Full-Scale Output Current
Peak Output Current
Output Offset Current
Output Offset Voltage3
Output Resistance
Scaling Resistors
Channel 1
Channel 2
VOLTAGE OUTPUTS, VW1 AND VW23
Multiplier Transfer Function
Either Channel
Multiplier Scaling Voltage, VU
Accuracy
TMIN to TMAX
Power Supply Sensitivity
Total Multiplication Error4
TMIN to TMAX
Control Feedthrough
TMIN to TMAX
TEMPERATURE RANGE
Rated Performance
POWER SUPPLIES
Operational Range
Current Consumption
+VS
−VS
Test Conditions/Comments
See Figure 20
VX = 0.1 V to 3.0 V, VY = ±2 V
VX = 0.1 V to 3.0 V, VY = ±2 V
VX = 3 V, VY = ±2 V
VX = 3.3 V, VY = ±5 V,
VS = ±7.5 V
VX = 0 V, VY = 0 V
See Figure 20, VX = 0 V,
VY = 0 V
Z1, W1 to CH1
Z2, W2 to CH2
See Figure 20
VX ≤ 3 V, −2 V < VY < +2 V
VX = 0 V to 3 V, VY = 0 V
AD539J
AD539K
AD539S
Min Typ
Max Min Typ Max Min Typ Max Unit
3.0
+3.2
500
1
3
30
3.0
+3.2
3.0
+3.2
V
V
500 500 Ω
41 1 21 1 41 mV
2 2 51 mV
30 30 μV/V
0.2 0.41
0.3
0.1 0.21
0.15
0.2 0.41
0.25 0.51
dB
dB
±1
±2 ±2.8
0.2
3
1.2
6
6
±2
1.51
101
±1
±2.8
0.2 1.51
3 101
±2
1.2
6
6
±1
±2.8
0.2 1.51
3 101
mA
mA
μA
mV
1.2 kΩ
6 kΩ
6 kΩ
VW = −VX × VY/VU
0.981 1.0
1.021
0.5 21
1
0.04
1 2.5
2
25 601
30
VW = −VX × VY/VU
0.991 1.0 1.011
0.5 11
0.5
0.04
0.6 1.5
1
15 301
15
VW = −VX × VY/VU
0.981 1.0 1.021
0.5 2
1.0 31
0.04
1 2.5
2 41
15 601
60 1201
V
%
%
%/V
% FSR
%
mV
mV
0
+70 0
+70 −55
+125 °C
±4.5
±15 ±4.5
±15 ±4.5
±15 V
8.5 10.21
18.5 22.21
8.5 10.21
18.5 22.21
8.5 10.21 mA
18.5 22.21 mA
1 Tested on all production units at final electrical test. Results from those tests are used to calculate outgoing quality levels.
2 Resistance value and absolute current outputs subject to 20% tolerance.
3 Specification assumes the external op amp is trimmed for negligible input offset.
4 Includes all errors.
Rev. B | Page 4 of 20
5 Page 
AD539
THEORY OF OPERATION
CIRCUIT DESCRIPTION
GENERAL RECOMMENDATIONS
Figure 18 shows a simplified schematic of the AD539. Q1 to Q6
are large-geometry transistors designed for low distortion and
low noise. Emitter-area scaling further reduces distortion: Q1 is
three times larger than Q2; Q4 and Q5 are each three times
larger than Q3 and Q6 and are twice as large as Q1 and Q2. A
stable reference current of IREF = 1.375 mA is produced by a
band gap reference circuit and applied to the common emitter
node of a controlled cascode formed by Q1 and Q2. When VX =
0 V, all of IREF flows in Q1 due to the action of the high gain
control amplifier, which lowers the voltage on the base of Q2.
As VX is raised, the fraction of IREF flowing in Q2 is forced to
balance the control current, VX/2.5 kΩ. At the full-scale value of
VX (3 V) this fraction is 0.873. Because the base of Q1, Q4, and
Q5 are at ground potential and the bases of Q2, Q3, and Q6 are
commoned, all three controlled cascodes divide the current
applied to their emitter nodes in the same proportion. The
control loop is stabilized by the external capacitor, CC.
The signal voltages, VY1 and VY2 (generically referred to as VY),
are first converted to currents by voltage-to-current converters
with a gm of 575 μmhos. Thus, the full-scale input of ±2 V
becomes a current of ±1.15 mA, which is superimposed on a
bias of 2.75 mA and applied to the common emitter node of
controlled cascode Q3/Q4 or Q5/Q6. As previously explained,
the proportion of this current steered to the output node is
linearly dependent on VX. Therefore, for full-scale VX and VY
inputs, a signal of ±1 mA (0.873 × ±1.15 mA) and a bias
component of 2.4 mA (0.873 × 2.75 mA) appear at the output.
The bias component absorbed by the 1.25 kΩ resistors also
connected to VX and the resulting signal current can be applied
to an external load resistor (in which case scaling is not
accurate) or can be forced into either or both of the 6 kΩ
feedback resistors (to the Z and W nodes) by an external op
amp. In the latter case, scaling accuracy is guaranteed.
The AD539 is a high speed circuit and requires considerable
care to achieve its full performance potential. A high quality
ground plane should be used with the device either soldered
directly into the board or mounted in a low profile socket. In
Figure 18, an open triangle denotes a direct, short connection
to this ground plane; the BASE COMMON pins (Pin 12 and
Pin 13) are especially prone to unwanted signal pickup. Power
supply decoupling capacitors of 0.1 μF to 1 μF should be
connected from the +VS and −VS pins (Pin 4 and Pin 5) to the
ground plane. In applications using external high speed op
amps, use separate supply decoupling. It is good practice to
insert small (10 Ω) resistors between the primary supply and
the decoupling capacitor.
The control amplifier compensation capacitor, CC, should
likewise have short leads to ground and a minimum value of
3 nF. Unless maximum control bandwidth is essential, it is
advisable to use a larger value of 0.01 μF to 0.1 μF to improve
the signal channel phase response, high frequency crosstalk,
and high frequency distortion. The control bandwidth is
inversely proportional to this capacitance, typically 2 MHz for CC =
0.01 μF, VX = 1.7 V. The bandwidth and pulse response of the
control channel can be improved by using a feedforward
capacitor of 5% to 20% the value of CC between the VX and
HF COMP pins (Pin 1 and Pin 2). Optimum transient response
results when the rise/fall time of VX are commensurate with the
control channel response time.
VX should not exceed the specified range of 0 V to 3 V. The ac
gain is zero for VX < 0 V but there remains a feedforward path
(see Figure 18) causing control feedthrough. Recovery time
from negative values of VX can be improved by adding a small
signal Schottky diode with its cathode connected to HF COMP
(Pin 2) and its anode grounded. This constrains the voltage
swing on CC. Above VX = 3.2 V, the ac gain limits at its
maximum value, but any overdrive appears as control
feedthrough at the output.
VX 1
0V TO +3V FS
2.5kΩ
CONTROL
AMPLIFIER
1.25kΩ
1.25kΩ
1.2mA FS
BASE COMMON 13
Q1 Q2
CHAN1
OUTPUT
14
±1mA FS
6kΩ
16 W1
6kΩ
15 Z1
W2 9
Z2 10
6kΩ
6kΩ
HF COMP
2
Q3 Q4 12 Q5 Q6
11
CHAN2
OUTPUT
±1mA FS
8
OUTPUT
COMMON
IREF =
CC (EXT)
3nF MIN
1.375mA
+VS 4
–VS 5
BAND-GAP
REFERENCE
GENERATOR
VY1
±2V FS
3
6
VY2
±2V FS
7
INPUT COMMON
Figure 18. Simplified Schematic of AD539 Multiplier (16-Lead SBDIP and PDIP Shown)
Rev. B | Page 10 of 20
11 Page | ||
| Páginas | Total 21 Páginas | |
| PDF Descargar | [ Datasheet AD539.PDF ] | |
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