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PDF AD53509 Data sheet ( Hoja de datos )
| Número de pieza | AD53509 | |
| Descripción | High-Performance Driver/Comparator Active Load on a Single Chip | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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High Performance Driver/Comparator,
Active Load on a Single Chip
AD53509
FEATURES
250 MHz operation
Driver/comparator and active load included
On-chip Schottky diode bridge
52-lead LQFP_EP package
APPLICATIONS
Automatic test equipment (ATE)
Semiconductor test systems
Board test systems
Instrumentation and characterization equipment
GENERAL DESCRIPTION
The AD53509 is a single chip that performs the pin electronics
functions of driver, comparator, and active load in ATE VLSI
and memory testers. In addition, a Schottky diode bridge for
the active load and a VCOM buffer are included internally.
The driver is a proprietary design that features three active
states: data high mode, data low mode, and term mode as well
as an inhibit state. The output voltage range is −2 V to +7 V to
accommodate a wide variety of test devices. The output leakage
is typically <250 nA over the signal range.
The dual comparator, with an input range equal to the driver
output range, features built-in latches and ECL-compatible
outputs. The outputs are capable of driving 50 Ω signal lines
terminated to −2 V. Signal tracking capability is >5 V/ns.
The active load can be set up to 40 mA load current with less
than a 10 μA linearity error through the set range. IOH, IOL, and
the buffered VCOM are independently adjustable. On-board
Schottky diodes provide high speed switching and low
capacitance.
Also included on the chip is an on-board temperature sensor
whose purpose is to give an indication of the surface temperature
of the DCL. This information can be used to measure θJC and θJA
or flag an alarm if proper cooling is lost. Output from the sensor
is a current sink that is proportional to absolute temperature.
The gain is trimmed to a nominal value of 1.0 μA/K. For example,
the output current can be sensed by using a 10 kΩ resistor
connected from 10 V to the THERM pin. A voltage drop across
the resistor then develops that equals
10 K × 1 μA/K = 10 mV/K = 2.98 V (at room temperature)
FUNCTIONAL BLOCK DIAGRAM
VCC
VH 47
VT 45
DATA 37
DATA 38
IOD 43
IOD 42
RLD 49
RLD 50
VL 31
HCOMP
LEH
LEH
QH
QH
VCC VCC VCC
51 52 34
VEE
39
DRIVER
VEE VEE VEE
40 41 32
AD53509
46Ω
COMPARATOR
QL
QL
LEL
LEL
LCOMP
VCOMI
ACTIVE LOAD
+1
IOLC
V/I
39nF
CHDCPL
VHDCPL
39nF
CLDCPL
VOUT
VLDCPL
VCOMS
IOLRTN
IOHRTN
INHL 36
INHL 35
IOHC
V/I
9 33 44 46 48
PWRGND
NC = NO CONNECT
OUT_L
258
VCCO
1.0µA/K
THERM
14 NC
26 NC
HQGND2 HQGND
Figure 1.
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2008 Analog Devices, Inc. All rights reserved.
1 page  
AD53509
COMPARATOR SPECIFICATIONS
All specifications are at TJ = 85°C ± 5°C. Outputs terminated in 150 Ω to GND, VCC = 11 V ± 3%, VEE = 6 V ± 3%, VCCO = 3.3 V,
unless otherwise specified. All temperatures coefficients are measured at TJ = 75°C to 95°C.
Table 2.
Parameter
DC INPUT CHARACTERISTICS
Offset Voltage, VOS
Offset Voltage, Drift
HCOMP, LCOMP Bias Current
Voltage Range, VCM
Differential Voltage, VDIFF
Gain and Linearity
LATCH ENABLE INPUTS
Logic 1 Current, IIH
Logic 0 Current, IIL
Logic Input Range
DIGITAL OUTPUTS
Logic 1 Voltage, VOH
Logic 0 Voltage, VOL
Slew Rate
VCCO Range
SWITCHING PERFORMANCE
Propagation Delay
Input to Output
Latch Enable to Output
Propagation Delay Temperature Coefficient
Propagation Delay Change with Respect to
Slew Rate: 0.5 V/ns, 1.0 V/ns, 3.0 V/ns
Slew Rate: 5.0 V/ns
Amplitude: 1.0 V, 3.0 V, 5.0 V
Equivalent Input Rise Time
Pulse Width Linearity
Settling Time
Latch Timing
Input Pulse Width
Setup Time
Hold Time
Hysteresis
Min
−25
−50
−2
−0.05
Typ
50
−250
−2
VCCO − 0.98
1
0
Max Unit Test Conditions
+25
+50
+7.0
9.0
+0.05
mV
μV/°C
μA
V
V
% FSR
CMV = 0 V
CMV = 0 V
VIN = 0 V
VIN = −2 V to +7 V (9 V FSR)
250 μA LEA, LEA, LEB, LEB = 3 V
μA LEA, LEA, LEB, LEB = −2 V
+3 V
VCCO − 1.5
8
V
V
V/ns
V
Qx or Qx, 16.7 mA load
Qx or Qx, 10 mA load
1.8
2
2
<±100
<±350
<±200
450
<±200
25
1.68
1.0
1.1
6
ns
ns
ps/°C
VIN = 2 V p-p
HCOMP = 1 V, LCOMP = 1 V
ps VIN = 0 V to 5 V
ps VIN = 0 V to 5 V
ps VIN = 1.0 V/ns
ps VIN = 0 V to 3 V, 3 V/ns
ps VIN = 0 V to 3 V, 3 V/ns, PW = 3 ns to 8 ns
ns Settling to ±8 mV, VIN = 1 V to 0 V
ns
ns
ns
mV Latch inputs programmed for hysteresis
Rev. B | Page 5 of 12
5 Page 
AD53509
OUTLINE DIMENSIONS
0.75
0.60
0.45
1.00 REF
SEATING
PLANE
1.45
1.40
1.35
0.15
0.05 0.10
COPLANARITY
0.20
0.09
7°
3.5°
0°
VIEW A
ROTATED 90° CCW
1.60
MAX
16.20
16.00 SQ
15.80
52
1
PIN 1
40
39
13
14
EXPOSED
PAD
TOP VIEW
(PINS DOWN)
6.00
BSC SQ
14.20
14.00 SQ
13.80
27
26
VIEW A
1.00
BSC
LEAD PITCH
0.50
0.42
0.35
COMPLIANT TO JEDEC STANDARDS MS-026-BEA-HU
Figure 3. 52-Lead Low Profile Quad Flat Package, Exposed Pad [LQFP_EP]
(SW-52-1)
Dimensions shown in millimeters
ORDERING GUIDE
Model
AD53509JSW
AD53509JSWZ1
1 Z = RoHS Compliant Part.
Temperature Range
0°C to 70°C
0°C to 70°C
Package Description
52-Lead LQFP_EP
52-Lead LQFP_EP
Package Option
SW-52-1
SW-52-1
Ordering Quantity
90
90
Rev. B | Page 11 of 12
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet AD53509.PDF ] | |
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