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PDF AD5260 Data sheet ( Hoja de datos )
| Número de pieza | AD5260 | |
| Descripción | 8-Bit Dual Nonvolatile Memory Digital Potentiometer | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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a
1-/2-Channel
15 V Digital Potentiometers
AD5260/AD5262
FEATURES
256 Positions
AD5260 – 1-Channel
AD5262 – 2-Channel (Independently Programmable)
Potentiometer Replacement
20 k⍀, 50 k⍀, 200 k⍀
Low Temperature Coefficient 35 ppm/؇C
4-Wire SPI-Compatible Serial Data Input
5 V to 15 V Single-Supply; ؎5.5 V Dual-Supply Operation
Power ON Mid-Scale Preset
APPLICATIONS
Mechanical Potentiometer Replacement
Instrumentation: Gain, Offset Adjustment
Stereo Channel Audio Level Control
Programmable Voltage to Current Conversion
Programmable Filters, Delays, Time Constants
Line Impedance Matching
Low Resolution DAC Replacement
GENERAL DESCRIPTION
The AD5260/AD5262 provide a single- or dual-channel, 256-
position, digitally controlled variable resistor (VR) device.* These
devices perform the same electronic adjustment function as a
potentiometer or variable resistor. Each channel of the AD5260/
AD5262 contains a fixed resistor with a wiper contact that taps the
fixed resistor value at a point determined by a digital code loaded
into the SPI-compatible serial-input register. The resistance between
the wiper and either end point of the fixed resistor varies linearly
with respect to the digital code transferred into the VR latch. The
variable resistor offers a completely programmable value of resistance,
between the A terminal and the wiper or the B terminal and the wiper.
The fixed A to B terminal resistance of 20 kW, 50 kW, or 200 kW has
a nominal temperature coefficient of 35 ppm/∞C. Unlike the majority
of the digital potentiometers in the market, these devices can operate
up to 15 V or ±5 V provided proper supply voltages are furnished.
Each VR has its own VR latch, which holds its programmed resistance
value. These VR latches are updated from an internal serial-to-parallel
shift register, which is loaded from a standard 3-wire serial-input
digital interface. The AD5260 contains an 8-bit serial register
while the AD5262 contains a 9-bit serial register. Each bit is clocked
into the register on the positive edge of the CLK. The AD5262
address bit determines the corresponding VR latch to be loaded
with the last 8 bits of the data word during the positive edging of
CS strobe. A serial data output pin at the opposite end of the serial
register enables simple daisy chaining in multiple VR applications
without additional external decoding logic. An optional reset pin
(PR) forces the wiper to the mid-scale position by loading 80H into
the VR latch.
*The terms digital potentiometers, VR, and RDAC are used interchangeably.
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
FUNCTIONAL BLOCK DIAGRAMS
A WB
SHDN
VDD
VSS
VL
CS
CLK
SDI
GND
RDAC
REGISTER
AD5260
LOGIC
POWER-ON
RESET
8
SERIAL INPUT REGISTER
PR
SDO
A1 W1 B1
A2 W2 B2
SHDN
VDD
VSS
VL
CS
CLK
SDI
GND
RDAC1 REGISTER
RDAC2 REGISTER
LOGIC
POWER-ON
RESET
8
SERIAL INPUT REGISTER
AD5262
PR
SDO
100
RWA
75
RWB
50
25
0
0 64 128 192 256
CODE – Decimal
Figure 1. RWA and RWB vs. Code
The AD5260/AD5262 are available in thin surface-mount TSSOP-14
and TSSOP-16 packages. All parts are guaranteed to operate over
the extended industrial temperature range of –40∞C to +85∞C.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2002
1 page  
Table I. AD5260 8-Bit Serial-Data Word Format
DATA
B7 B6 B5 B4 B3 B2 B1 B0
D7 D6 D5 D4 D3 D2 D1 D0
MSB
LSB
27 20
1
SDI
0
1
CLK
0
1
CS
0
1
VOUT 0
D7 D6 D5 D4 D3 D2 D1 D0
RDAC REGISTER LOAD
Figure 2a. AD5260 Timing Diagram
1
SDI
0
1
CLK
0
1
CS
0
1
VOUT 0
A0 D7 D6 D5 D4 D3 D2 D1 D0
RDAC REGISTER LOAD
Figure 2b. AD5262 Timing Diagram
AD5260/AD5262
Table II. AD5262 9-Bit Serial-Data Word Format
ADDR
DATA
B8 B7 B6 B5 B4 B3 B2 B1 B0
A0 D7 D6 D5 D4 D3 D2 D1 D0
MSB
LSB
28 27
20
SDI 1
(DATA IN) 0
SDO 1
(DATA OUT)
0
1
CLK
0
1
CS
0
Ax OR Dx
Ax OR Dx
Dx
tDS
Dx
tCH
tCSS
tCL
VOUT VDD
0V
tDH
tPD_MAX
tCS1
tCSH
tCSW
tS
؎1 LSB ERROR BAND
؎1 LSB
Figure 2c. Detail Timing Diagram
1
PR 0
tRS
VOUT VDD
tS
0V ؎1 LSB ERROR BAND
؎1 LSB
Figure 2d. Preset Timing Diagram
REV. 0
–5–
5 Page 
0
–0.5
–1.0
–1.5
VDD/VSS = +15V/0V
VDD/VSS = ؎5V
–2.0
VDD/VSS = +5V/0V
–2.5
–40 –20
0 20 40 60
TEMPERATURE – ؇C
80 100
TPC 10. Full-Scale Error
2.5
2.0
VDD/VSS = +5V/0V
1.5
VDD/VSS = ؎5V
1.0
VDD/VSS = +15V/0V
0.5
0
–40 –20
0 20 40 60
TEMPERATURE – ؇C
80 100
TPC 11. Zero-Scale Error
AD5260/AD5262
1
VLOGIC = ؉5V
VIH = ؉5V
VIL = 0V
0.1
0.01
VDD/VSS = ؉15V/0V
VDD/VSS = ؎5V
0.001
–40
–7 26 59 92
TEMPERATURE – ؇C
125
TPC 12. Supply Current vs.
Temperature
28.0
27.5
27.0
VDD/VSS = +15V/0V
26.5
26.0
25.5
VDD/VSS = ؎5V
25.0
24.5
–40
–7 26 59 92
TEMPERATURE – ؇C
125
TPC 13. ILOGIC vs. Temperature
1k
VDD/VSS = 5V/0V VLOGIC = 5V
100
10 VDD/VSS = 5V/0V VLOGIC = 3V
0123
VIH – V
4
5
TPC 14. ILOGIC vs. Digital Input
Voltage
80
70
60
50
20k⍀
40
50k⍀
30
20
10
0
–10
200k⍀
–20
0 32 64 96 128 160 192 224 256
CODE – Decimal
TPC 15. Rheostat Mode Tempco
DRWB/DT vs. Code
120
100
50k⍀
80
60
20k⍀
40
20
0
–20
200k⍀
–40
–60
0
32 64 96 128 160 192 224 256
CODE – Decimal
TPC 16. Potentiometer Mode
DVWB/DT vs. Code
6
TA = 25؇C
0
–6
–12
–18
–24
–30
–36
–42
–48
CODE = FFH
80H
40H
20H
10H
08H
04H
02H
01H
–54
1k
10k 100k
FREQUENCY – Hz
1M
TPC 17. Gain vs. Frequency vs.
Code, RAB = 20 kW
REV. 0
–11–
11 Page | ||
| Páginas | Total 20 Páginas | |
| PDF Descargar | [ Datasheet AD5260.PDF ] | |
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