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PDF AD7390 Data sheet ( Hoja de datos )
| Número de pieza | AD7390 | |
| Descripción | 3 V Serial-Input Micropower 10-Bit and 12-Bit DACs | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de AD7390 (archivo pdf) en la parte inferior de esta página. Total 12 Páginas | ||
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a
3 V Serial-Input
Micropower 10-Bit and 12-Bit DACs
AD7390/AD7391
FEATURES
Micropower—100 A
Single-Supply—2.7 V to 5.5 V Operation
Compact 1.75 mm Height SO-8 Package
and 1.1 mm Height TSSOP-8 Package
AD7390—12-Bit Resolution
AD7391—10-Bit Resolution
SPI and QSPI Serial Interface Compatible with Schmitt
Trigger Inputs
APPLICATIONS
Automotive 0.5 V to 4.5 V Output Span Voltage
Portable Communications
Digitally Controlled Calibration
FUNCTIONAL BLOCK DIAGRAM
REF
CLR
LD
CLK
SDI
AD7390
12-BIT DAC
12
DAC REGISTER
EN 12
SERIAL REGISTER
VDD
VOUT
GND
GENERAL DESCRIPTION
The AD7390/AD7391 family of 10-bit and 12-bit voltage-
output digital-to-analog converters is designed to operate
from a single 3 V supply. Built using a CBCMOS process,
these monolithic DACs offer the user low cost, and ease-of-use
in single-supply 3 V systems. Operation is guaranteed over the
supply voltage range of 2.7 V to 5.5 V consuming less than 100 µA
making this device ideal for battery operated applications.
The full-scale voltage output is determined by the external
reference input voltage applied. The rail-to-rail REFIN to
DACOUT allows for a full-scale voltage set equal to the positive
supply VDD or any value in between.
A doubled-buffered serial-data interface offers high-speed,
3-wire, SPI and microcontroller compatible inputs using data
in (SDI), clock (CLK) and load strobe (LD) pins. Addition-
ally, a CLR input sets the output to zero scale at power on or
upon user demand.
Both parts are offered in the same pinout to allow users to select
the amount of resolution appropriate for their application without
circuit card redesign.
The AD7390/AD7391 are specified over the extended industrial
(Ϫ40°C to ϩ85°C) temperature range. The AD7391AR is
specified for the Ϫ40°C to ϩ125°C automotive temperature
range. The AD7390/AD7391s are available in plastic DIP, and
low profile 1.75 mm height SO-8 surface mount packages. The
AD7391ARU is available for ultracompact applications in a thin
1.1 mm TSSOP-8 package.
1.00
AD7390
0.75
0.50
0.25
؊0.00
؊0.25
؊0.50
؊0.75
VDD = 3.0V
TA = ؊55؇C, +25؇C, +85؇C
SUPERIMPOSED
؊1.00
0
512 1024 1536 2048 2560
CODE – Decimal
3072
3584 4096
Figure 1. Differential Nonlinearity Error vs. Code
2.0
AD7390
1.5
1.0
+25؇C, +85؇C
0.5
0.0
؊0.5
؊1.0
؊1.5
VDD = 3.0V
VREF = 2.5V
؊2.0
0
512 1024
؊55؇C
1536 2048 2560 3072
CODE – Decimal
2584
4096
Figure 2. INL Error vs. Code and Temperature
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2002
1 page  
AD7390/AD7391
SDI
CLK
LD
SDI
CLK
LD
CLR
FS
VOUT
ZS
D11 D10
D9
AD7390 AD7391
tLD1
tLD1
D7
D5 D4 D3 D2 D1 D0
tLD2
DAC REGISTER LOAD
tDS
tCL
tDH
tCH
tLDW
tS
Figure 4. Timing Diagram
0.1% FS
ERROR BAND
tCLRW
tS
CLK
↑
X
X
X
X
CLR
H
H
L
↑
↑
LD
H
L
X
H
L
↑ = Positive logic transition.
X = Don’t care.
Table I. Control-Logic Truth Table
Serial Shift Register Function
Shift-Register-Data Advanced One-Bit
Disables
No Effect
No Effect
Disabled
DAC Register Function
Latched
Updated with Current Shift Register Contents
Loaded with all Zeros
Latched with all Zeros
Previous SR Contents Loaded (Avoid usage of CLR
when LD is logic low, since SR data could be corrupted
if a clock edge takes place, while CLR returns high.)
Table II. AD7390 Serial Input Register Data Format, Data is Loaded in the MSB-First Format
MSB
B11
AD7390 D11
B10
D10
B9
D9
B8 B7 B6 B5 B4 B3 B2 B1
D8 D7 D6 D5 D4 D3 D2 D1
LSB
B0
D0
Table III. AD7391 Serial Input Register Data Format, Data is Loaded in the MSB-First Format
MSB
B9 B8 B7 B6 B5 B4 B3 B2 B1
AD7391 D9 D8 D7 D6 D5 D4 D3 D2 D1
LSB
B0
D0
REV. A
–5–
5 Page 
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
8-Lead SOIC
(R-8)
0.1968 (5.00)
0.1890 (4.80)
8
0.1574 (4.00)
0.1497 (3.80) 1
5
0.2440 (6.20)
4 0.2284 (5.80)
PIN 1
0.0500 (1.27)
BSC
0.0196 (0.50)
0.0099 (0.25) ؋ 45؇
0.0098 (0.25)
0.0040 (0.10)
SEATING
PLANE
0.0688 (1.75)
0.0532 (1.35)
8؇
0.0192 (0.49)
0.0098 (0.25) 0؇
0.0138 (0.35)
0.0075 (0.19)
0.0500 (1.27)
0.0160 (0.41)
8-Lead Plastic DIP
(N-8)
0.430 (10.92)
0.348 (8.84)
85
0.280 (7.11)
0.240 (6.10)
14
PIN 1
0.210
(5.33)
MAX
0.160 (4.06)
0.115 (2.93)
0.100 (2.54)
BSC
0.060 (1.52)
0.015 (0.38)
0.130
(3.30)
MIN
0.022 (0.558) 0.070 (1.77) SEATING
0.014 (0.356) 0.045 (1.15) PLANE
0.325 (8.25)
0.300 (7.62)
0.195 (4.95)
0.115 (2.93)
0.015 (0.381)
0.008 (0.204)
8-Lead TSSOP
(RU-8)
0.122 (3.10)
0.114 (2.90)
85
0.177 (4.50)
0.169 (4.30)
14
0.256 (6.50)
0.246 (6.25)
PIN 1
0.0256 (0.65)
0.006 (0.15)
BSC
0.0433
(1.10)
0.002 (0.05)
MAX
8؇
SEATING 0.0118 (0.30)
PLANE 0.0075 (0.19)
0.0079 (0.20) 0؇
0.0035 (0.090)
0.028 (0.70)
0.020 (0.50)
AD7390/AD7391
REV. A
–11–
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet AD7390.PDF ] | |
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