|
|
PDF AD708 Data sheet ( Hoja de datos )
| Número de pieza | AD708 | |
| Descripción | Ultralow Offset Voltage Dual Op Amp | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de AD708 (archivo pdf) en la parte inferior de esta página. Total 16 Páginas | ||
|
No Preview Available !
FEATURES
Very high dc precision
30 μV maximum offset voltage
0.3 μV/°C maximum offset voltage drift
0.35 μV p-p maximum voltage noise (0.1 Hz to 10 Hz)
5 million V/V minimum open-loop gain
130 dB minimum CMRR
120 dB minimum PSRR
Matching characteristics
30 μV maximum offset voltage match
0.3 μV/°C maximum offset voltage drift match
130 dB minimum CMRR match
Available in 8-lead narrow body, PDIP, and
hermetic CERDIP and CERDIP/883B packages
GENERAL DESCRIPTION
The AD708 is a high precision, dual monolithic operational
amplifier. Each amplifier individually offers excellent dc
precision with maximum offset voltage and offset voltage drift
of any dual bipolar op amp.
The matching specifications are among the best available in any
dual op amp. In addition, the AD708 provides 5 V/μV mini-
mum open-loop gain and guaranteed maximum input voltage
noise of 350 nV p-p (0.1 Hz to 10 Hz). All dc specifications
show excellent stability over temperature, with offset voltage
drift typically 0.1 μV/°C and input bias current drift of
25 pA/°C maximum.
The AD708 is available in four performance grades. The
AD708J is rated over the commercial temperature range of
0°C to 70°C and is available in a narrow body, PDIP. The
AD708A and AD708B are rated over the industrial temperature
range of −40°C to +85°C and are available in a CERDIP.
Ultralow Offset Voltage
Dual Op Amp
AD708
PIN CONFIGURATION
OUTPUT A 1
–IN A 2
+IN A 3
–VS 4
AD708
–A
+ B–
+
8 +VS
7 OUTPUT B
6 –IN B
5 +IN B
TOP VIEW
(Not to Scale)
Figure 1. PDIP (N) and CERDIP (Q) Packages
The AD708S is rated over the military temperature range of
−55°C to +125°C and is available in a CERDIP military version
processed to MIL-STD-883B.
PRODUCT HIGHLIGHTS
1. The combination of outstanding matching and individual
specifications make the AD708 ideal for constructing high
gain, precision instrumentation amplifiers.
2. The low offset voltage drift and low noise of the AD708
allow the designer to amplify very small signals without
sacrificing overall system performance.
3. The AD708 10 V/μV typical open-loop gain and 140 dB
common-mode rejection make it ideal for precision
applications.
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2006 Analog Devices, Inc. All rights reserved.
1 page  
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter
Rating
Supply Voltage
Internal Power Dissipation1
Input Voltage2
Output Short-Circuit Duration
±22 V
±VS
Indefinite
Differential Input Voltage
Storage Temperature Range (Q)
Storage Temperature Range (N)
Lead Temperature (Soldering 60 sec)
+VS and −VS
−65°C to +150°C
−65°C to +125°C
300°C
1 Thermal Characteristics
8-lead PDIP: θJC = 33°C/W, θJA = 100°C/W
8-lead CERDIP: θJC = 30°C/W, θJA = 110°C/W
2 For supply voltages less than ±22 V, the absolute maximum input voltage is
equal to the supply voltage.
AD708
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. C | Page 5 of 16
5 Page 
OPERATION WITH A GAIN OF −100
To show the outstanding dc precision of the AD708 in a real
application, Table 3 shows an error budget calculation for a gain
of −100. This configuration is shown in Figure 28.
Table 3.
Error Sources
VOS
IOS
Gain (2 kΩ Load)
Noise
VOS Drift
Total Unadjusted
Error
With Offset
Calibrated Out
Maximum Error Contribution
AV = 100 (S Grade)
(Full Scale: VOUT = 10 V, VIN = 100 mV)
30 μV/100 mV
= 300 ppm
(100 kΩ)(1 nA)/10 V
= 10 ppm
10 V/(5 × 106)/100 mV = 20 ppm
0.35 mV/100 mV
= 4 ppm
(0.3 mV/°C)/100 mV
= 3 ppm/°C
@ 25°C
−55°C to +125°C
= 334 ppm > 11 bits
= 634 ppm > 10 bits
@ 25°C
−55°C to +125°C
= 34 ppm > 14 bits
= 334 ppm > 11 bits
1kΩ
VIN
1kΩ
100kΩ
+VS
0.1µF
2– 7
1/2
AD708
6
3+
4 0.1µF
VOUT
–VS
Figure 28. Gain of −100 Configuration
This error budget assumes no error in the resistor ratio and no
error from power supply variation (the 120 dB minimum PSRR
of the AD708S makes this a good assumption). The external
resistors can cause gain error from mismatch and drift over
temperature.
HIGH PRECISION PROGRAMMABLE GAIN
AMPLIFIER
The three op amp programmable gain amplifier shown in
Figure 29 takes advantage of the outstanding matching
characteristics of the AD708 to achieve high dc precision.
AD708
1/2
VINA AD708
OUT
1–4
A0 S1
A1 S2
S3
S4
10kΩ
10kΩ
10kΩ
9.9kΩ
10kΩ
RA
AD7502
–VS
100Ω
1kΩ 10kΩ
10kΩ
AD707
+VS S8
S7
9.9kΩ
S6
OUT
5–8
S5
10kΩ
10kΩ
10kΩ
RB
VINB
1/2
AD708
Figure 29. Precision PGA
The gains of the circuit are controlled by the select lines, A0 and
A1, of the AD7502 multiplexer, and are 1, 10, 100, and 1000 in
this design.
The input stage attains very high dc precision due to the 30 μV
maximum offset voltage match of the AD708S and the 1 nA
maximum input bias current match. The accuracy is main-
tained over temperature because of the ultralow drift
performance of the AD708.
To achieve 0.1% gain accuracy, along with high common-mode
rejection, the circuit should be trimmed.
To maximize common-mode rejection
1. Set the select lines for gain = 1 and ground VINB.
2. Apply a precision dc voltage to VINA and trim RA until
VO = −VINA to the required precision.
3. Connect VINB to VINA and apply an input voltage equal to
the full-scale common mode expected.
4. Trim RBB until VO = 0 V.
To minimize gain errors
1. Select gain = 10 with the control lines and apply a
differential input voltage.
2. Adjust the 100 Ω potentiometer to VO = 10 VIN
(adjust VIN magnitude as necessary).
3. Repeat Step 1 and Step 2 for gain = 100 and gain = 1000,
adjusting the 1 kΩ and 10 kΩ potentiometers, respectively.
The design shown in Figure 29 should allow for 0.1% gain
accuracy and 0.1 μV/V common-mode rejection when ±1%
resistors and ±5% potentiometers are used.
Rev. C | Page 11 of 16
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet AD708.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| AD7001 | LC2MOS GSM Baseband I/O Port | Analog Devices |
| AD7002 | LC2MOS GSM Baseband I/O Port | Analog Devices |
| AD7008 | CMOS DDS Modulator | Analog Devices |
| AD7010 | CMOS JDC p/4 DQPSK Baseband Transmit Port | Analog Devices |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |