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PDF AD698 Data sheet ( Hoja de datos )
| Número de pieza | AD698 | |
| Descripción | Universal LVDT Signal Conditioner | |
| Fabricantes | Analog Devices | |
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FEATURES
Single Chip Solution, Contains Internal Oscillator and
Voltage Reference
No Adjustments Required
Interfaces to Half-Bridge, 4-Wire LVDT
DC Output Proportional to Position
20 Hz to 20 kHz Frequency Range
Unipolar or Bipolar Output
Will Also Decode AC Bridge Signals
Outstanding Performance
Linearity: 0.05%
Output Voltage: ؎11 V
Gain Drift: 20 ppm/؇C (typ)
Offset Drift: 5 ppm/؇C (typ)
Universal
LVDT Signal Conditioner
AD698
FUNCTIONAL BLOCK DIAGRAM
AMP
VOLTAGE
REFERENCE
OSCILLATOR
AD698
B
A
B
FILTER
AMP
A
PRODUCT DESCRIPTION
The AD698 is a complete, monolithic Linear Variable Differen-
tial Transformer (LVDT) signal conditioning subsystem. It is
used in conjunction with LVDTs to convert transducer mechan-
ical position to a unipolar or bipolar dc voltage with a high de-
gree of accuracy and repeatability. All circuit functions are
included on the chip. With the addition of a few external passive
components to set frequency and gain, the AD698 converts the
raw LVDT output to a scaled dc signal. The device will operate
with half-bridge LVDTs, LVDTs connected in the series op-
posed configuration (4-wire), and RVDTs.
The AD698 contains a low distortion sine wave oscillator to
drive the LVDT primary. Two synchronous demodulation
channels of the AD698 are used to detect primary and second-
ary amplitude. The part divides the output of the secondary by
the amplitude of the primary and multiplies by a scale factor.
This eliminates scale factor errors due to drift in the amplitude
of the primary drive, improving temperature performance and
stability.
The AD698 uses a unique ratiometric architecture to eliminate
several of the disadvantages associated with traditional ap-
proaches to LVDT interfacing. The benefits of this new cir-
cuit are: no adjustments are necessary; temperature stability is
improved; and transducer interchangeability is improved.
The AD698 is available in two performance grades:
Grade
AD698AP
AD698SQ
Temperature Range
–40°C to +85°C
–55°C to +125°C
Package
28-Pin PLCC
24-Pin Cerdip
PRODUCT HIGHLIGHTS
1. The AD698 offers a single chip solution to LVDT signal
conditioning problems. All active circuits are on the mono-
lithic chip with only passive components required to com-
plete the conversion from mechanical position to dc voltage.
2. The AD698 can be used with many different types of posi-
tion sensors. The circuit is optimized for use with any
LVDT, including half-bridge and series opposed, (4 wire)
configurations. The AD698 accommodates a wide range of
input and output voltages and frequencies.
3. The 20 Hz to 20 kHz excitation frequency is determined by a
single external capacitor. The AD698 provides up to 24 volts
rms to differentially drive the LVDT primary, and the
AD698 meets its specifications with input levels as low as
100 millivolts rms.
4. Changes in oscillator amplitude with temperature will not af-
fect overall circuit performance. The AD698 computes the
ratio of the secondary voltage to the primary voltage to deter-
mine position and direction. No adjustments are required.
5. Multiple LVDTs can be driven by a single AD698 either in
series or parallel as long as power dissipation limits are not
exceeded. The excitation output is thermally protected.
6. The AD698 may be used as a loop integrator in the design of
simple electromechanical servo loops.
7. The sum of the transducer secondary voltages do not need to
be constant.
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
© Analog Devices, Inc., 1995
One Technology Way, P.O. Box 9106, Norwood. MA 02062-9106, U.S.A.
Tel: 617/329-4700
Fax: 617/326-8703
1 page  
AD698
THEORY OF OPERATION
A block diagram of the AD698 along with an LVDT (linear
variable differential transformer) connected to its input is shown
in Figure 5 below. The LVDT is an electromechanical trans-
ducer—its input is the mechanical displacement of a core, and
its output is an ac voltage proportional to core position. Two
popular types of LVDTs are the half-bridge type and the series
opposed or four-wire LVDT. In both types the moveable core
couples flux between the windings. The series-opposed con-
nected LVDT transducer consists of a primary winding ener-
gized by an external sine wave reference source and two
secondary windings connected in the series opposed configuration.
The output voltage across the series secondary increases as the core
is moved from the center. The direction of movement is detected
by measuring the phase of the output. Half-bridge LVDTs have a
single coil with a center tap and work like an autotransformer. The
excitation voltage is applied across the coil; the voltage at the center
tap is proportional to position. The device behaves similarly to a
resistive voltage divider.
AMP
VOLTAGE
REFERENCE
OSCILLATOR
AD698
B
A
B
FILTER
AMP
A
Figure 5. Functional Block Diagram
The AD698 energizes the LVDT coil, senses the LVDT output
voltages and produces a dc output voltage proportional to core
position. The AD698 has a sine wave oscillator and power am-
plifier to drive the LVDT. Two synchronous demodulation
stages are available for decoding the primary and secondary
voltages. A decoder determines the ratio of the output signal
voltage to the input drive voltage (A/B). A filter stage and out-
put amplifier are used to scale the resulting output.
The oscillator comprises a multivibrator that produces a triwave
output. The triwave drives a sine shaper that produces a low dis-
tortion sine wave. Frequency and amplitude are determined by a
single resistor and capacitor. Output frequency can range from
20 Hz to 20 kHz and amplitude from 2 V to 24 V rms. Total har-
monic distortion is typically –50 dB.
The AD698 decodes LVDTs by synchronously demodulating
the amplitude modulated input (secondaries), A, and a fixed in-
put reference (primary or sum of secondaries or fixed input), B.
A common problem with earlier solutions was that any drift in
the amplitude of the drive oscillator corresponded directly to a
gain error in the output. The AD698, eliminates these errors by
calculating the ratio of the LVDT output to its input excitation in
order to cancel out any drift effects. This device differs from the
AD598 LVDT signal conditioner in that it implements a different
circuit transfer function and does not require the sum of the LVDT
secondaries (A + B) to be constant with stroke length.
The AD698 block diagram is shown below. The inputs consist
of two independent synchronous demodulation channels. The B
channel is designed to monitor the drive excitation to the LVDT.
The full wave rectified output is filtered by C2 and sent to the
computational circuit. Channel A is identical except that the
comparator is pinned out separately. Since the A channel may
reach 0 V output at LVDT null, the A channel demodulator is
usually triggered by the primary voltage (B Channel). In addi-
tion, a phase compensation network may be required to add a
phase lead or lag to the A Channel to compensate for the LVDT
primary to secondary phase shift. For half-bridge circuits the
phase shift is noncritical, and the A channel voltage is large
enough to trigger the demodulator.
C2
BFILT1
BFILT2
+VS
B
CHANNEL
–BIN
+BIN
V/I
±1
FILTER
C5
OUT
FILTER C4 FB
R2
VOUT
–ACOMP
+ACOMP
–AIN
+AIN
COMP
COMP
DUTY CYCLE
DIVIDER
A/B = 1 = 100%
DUTY
A
B
FILTER
V/I ±1
IREF
500µA
DEMODULATOR
A
CHANNEL
AFILT1
AD698
AFILT2
C3
OFF 2
–VS
OFF 1
V
Figure 6. AD698 Block Diagram
Once both channels are demodulated and filtered a division cir-
cuit, implemented with a duty cycle multiplier, is used to calcu-
late the ratio A/B. The output of the divider is a duty cycle.
When A/B is equal to 1, the duty cycle will be equal to 100%.
(This signal can be used as is if a pulse width modulated output
is required.) The duty cycle drives a circuit that modulates and
filters a reference current proportional to the duty cycle. The
output amplifier scales the 500 µA reference current converting
it to a voltage. The output transfer function is thus:
VOUT = IREF × A/B × R2, where IREF = 500 µA
REV. B
–5–
5 Page 
VOUT
=
2 × RS
RG + 1
× VIN
Solving for VOUT/VIN = 400 and setting RG = 100 Ω then:
RS = [400 – 1] × RG/2 = 19.95 kΩ
Choose an oscillator amplitude that is in the range of 1 V to
3.5 V rms. For an input excitation level of 3 V rms, the output
signal from the amplifier gain stage will be 3.5 V rms × 0.8 V or
2.4 V rms, which is in the acceptable range.
AD698
Since A/B is known, the value of R2, the output FS resistor may
be chosen by the formula:
VOUT = A/B × 500 µA × R2
For a 10 V output at FS, with an A/B of 0.8; solve for R2.
R2 = 10 V [0.8 × 500 µA] = 25.0 kΩ
This will result in a VOUT of 10 V for a full-scale signal from the
bridge. The other components, C1, C2, C3, C4 may be selected
by following the guidelines on general device operation men-
tioned earlier.
If a gain trim is required, then a trim resistor can be used to ad-
just either R2 or RG. Bridge offsets should be adjusted by a trim
network on the OFFSET 1 and OFFSET 2 pins of the AD698.
+15V
–15V
6.8µF
RESISTORS,
INDUCTORS
OR CAPACITORS
A1
RS
RG RS
A2
DUAL
OP AMP
6.8µF
100nF
100nF
R1
C1
C2
1 –VS
AD698
+VS 24
R4
2 EXC1 OFFSET1 23
R3
3 EXC2 OFFSET2 22
SIGNAL
REFERENCE
4 LEV1
SIG REF 21
5 LEV2
SIG OUT 20
R2
RL
VOUT
6 FREQ1 FEEDBACK 19
C4 1000pF
7 FREQ2 OUT FILT 18
8 BFILT1
9 BFILT2
AFILT1 17
AFILT2 16
C3
10 –BIN
–ACOMP 15
11 +BIN
12 –AIN
+ACOMP 14
+AIN 13
AB
PHASE
LAG/LEAD
NETWORK
CD
PHASE LAG
AB
C
PHASE LEAD
AB
RT RS
RS RT RS
CC
CD
CD
PHASE LAG = Arc Tan (Hz RC);
PHASE LEAD = Arc Tan 1/(Hz RC)
WHERE R = RS// (RS + RT)
Figure 20. AD698 Interconnection Diagram for AC Bridge Applications
REV. B
–11–
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet AD698.PDF ] | |
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