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PDF AD642 Data sheet ( Hoja de datos )
| Número de pieza | AD642 | |
| Descripción | Precision/ Low Cost Dual BiFET Op Amp | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de AD642 (archivo pdf) en la parte inferior de esta página. Total 6 Páginas | ||
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FEATURES
Matched Offset Voltage
Matched Offset Voltage Over Temperature
Matched Bias Current
Crosstalk: –124 dB @ 1 kHz
Low Bias Current: 35 pA max Warmed Up
Low Offset Voltage: 500 V max
Low Input Voltage Noise: 2 V p-p
High Open Loop Gain
Low Quiescent Current: 2.8 mA max
Low Total Harmonic Distortion
Standard Dual Amplifier Pin Out
Available in Hermetic Metal Can Package and Chip Form
MIL-STD-883B Processing Available
Single Version Available: AD542
Precision, Low Cost
Dual BiFET Op Amp
AD642
PIN CONFIGURATION
PRODUCT DESCRIPTION
The AD642 is a pair of matched high speed monolithic BiFET
operational amplifier fabricated with the most advanced bipolar,
JFET and laser trimming technologies. The AD642 offers
matched bias currents that are significantly lower than currently
available monolithic dual FET input operational amplifiers:
35 pA max matched to 25 pA for the AD642K and L; 75 pA
max, matched to 35 pA for the AD642J and S. In addition, the
offset voltage is laser trimmed to less than 0.5 mV and matched
to 0.25 mV for the AD642L, 1.0 mV and matched to 0.5 mV for
the AD642K, utilizing Analog’s laser-wafer trimming (LWT)
process.
The tight matching and temperature tracking between the
operational amplifiers is achieved by ion-implanted JFETs and
laser-wafer trimming. Ion-implantation permits the fabrication of
precision, matched JFETs on a monolithic bipolar chip. The
optimizes the process to product matched bias currents which
have lower initial bias currents than other popular BiFET op
amps. Laser-wafer trimming each amplifier’s input offset voltage
assures tight initial match and combined with superior IC
processing guarantees offset voltage tracking over the tempera-
ture range.
The AD642 is recommended for applications in which excellent
ac and dc performance is required. The matched amplifiers
provide a low-cost solution for true instrumentation amplifiers,
log ratio amplifiers, and output amplifiers for four quadrant
multiplying D/A converters such as the AD7541.
The AD642 is available in four versions: the ‘‘J’’, ‘‘K’’ and ‘‘L,’’
all specified over the 0°C to +70°C temperature range and one
version, ‘‘S,’’ over the –55°C to +125°C extended operating
temperature range. All devices are packaged in the hermetically-
sealed, TO-99 metal can or available in chip form.
PRODUCT HIGHLIGHTS
1. The AD642 has tight matching specifications to ensure high
performance, eliminating the need to match individual
devices.
2. Analog Devices, unlike some manufacturers, specifies each
device for the maximum bias current at either input in the
warmed-up condition, thus assuring the user that the AD642
will meet its published specifications in actual use.
3. Laser-wafer-trimming reduces offset voltage to as low as
0.5 mV max and matched side to side to 0.25 mV
(AD642L), thus eliminating the need for external nulling.
4. Low voltage noise (2 µV, p-p), and high open loop gain
enhance the AD642’s performance as a precision op amp.
5. The standard dual amplifier pin out allows the AD642 to
replace lower performance duals without redesign.
6. The AD642 is available in chip form.
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
Fax: 617/326-8703
1 page  
AD642
Figure 23. Settling Time Test Circuit
Fast settling time (8 µs to 0.01% for 20 V p-p step), low power
and low offset voltage make the AD642 an excellent choice for
use as an output amplifier for current output D/A converters
such as the AD7541.
1mV
10V 5µs
VERROR 1mV/DIV
INPUT 10V/DIV
Figure 24. Settling Characteristic Detail
The upper trace of the oscilloscope photograph of Figure 24
shows the settling characteristic of the AD642. The lower trace
represents the input to Figure 23. The AD642 has been
designed for fast settling to 0.01%, however, feedback compo-
nents, circuit layout and circuit design must be carefully
considered to obtain optimum settling time.
Figure 26. Precision FET Input Instrumentation Amplifier
The output impedance of a CMOS DAC varies with the digital
word thus changing the noise of the amplifier circuit. This effect
will cause a nonlinearity whose magnitude is dependent on the
offset voltage of the amplifier. The AD642K with trimmed
offset will minimize the effect. The Schottky protection diodes
recommended for use with many older CMOS DACs are not
required when using the AD642.
Figure 25. 0.1 Hz to 10 Hz 2nd Order Bandpass Filter,
Maximally Flat
The low frequency (1/f) noise has a power spectrum that is
inversely proportional to frequency. Typically this noise is not
important above 10 Hz, but it can be important for low fre-
quency-high gain applications.
The low noise characteristic of the AD642 make it ideal for 1/f
noise testing circuits. The circuit of Figure 25 is a 0.1 Hz to
10 Hz bandpass filter with second order filter characteristics.
The circuit illustrated in Figure 26 uses two AD642s to
construct an instrumentation amplifier with low input current
(35 pA max), high linearity and low offset voltage and offset
voltage drift. The AD644 may be substituted for increased
speed, but the higher open-loop gain of the AD642 maintains
better linearity over the gain range of 1 to 1000. Amplifier A1 is
an AD642L for low input offset voltage (250 µV max) and low
input offset voltage drift at high gains because matching and
tracking are very important for the balanced input stage.
Amplifier A2 serves two nonrelated functions, output amplifier
and active data-guard drive, and does not require close match-
ing between sections; thus it may be an AD642J.
Figure 27a. AD642 Used as DAC Output Amplifier
Figure 27a illustrates the AD7541 12-bit digital-to-analog
converter, connected for bipolar operation. Since the digital
input can accept bipolar numbers and VREF can accept a
bipolar analog input, the circuit can perform a 4-quadrant
multiplication.
V REF IN , 2 0 V p -p , 3 3 k H z
10V/DIV VERT,
5µs/DIV HORIZ.
10V
5V 5µs
V OUT
5V/DIV VERT,
5µs/DIV HORIZ.
SETTLING TIM E: 10µs TO
0.01% ON 20V STEP
Figure 27b. Voltage Output DAC Settling Characteristic
The photo above shows the output of the circuit Figure 27a.
The upper trace represents the reference input, and the bottom
trace shows the output voltage for a digital input of all ones on
the DAC. The 47 pF capacitor across the feedback resistor
compensates for the DAC output capacitance, and the 150 pF
load capacitor serves to minimize output glitches.
Log amplifiers or log ratio amplifiers are useful in applica-
tions requiring compression of wide-range analog input data,
REV. 0
–5–
5 Page | ||
| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet AD642.PDF ] | |
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