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PDF AD7927 Data sheet ( Hoja de datos )
| Número de pieza | AD7927 | |
| Descripción | 8-Channel/ 200 kSPS/ 12-Bit ADC with Sequencer in 20-Lead TSSOP | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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8-Channel, 200 kSPS, 12-Bit ADC
with Sequencer in 20-Lead TSSOP
AD7927
FEATURES
Fast Throughput Rate: 200 kSPS
Specified for AVDD of 2.7 V to 5.25 V
Low Power:
3.6 mW Max at 200 kSPS with 3 V Supply
7.5 mW Max at 200 kSPS with 5 V Supply
8 (Single-Ended) Inputs with Sequencer
Wide Input Bandwidth:
70 dB Min SINAD at 50 kHz Input Frequency
Flexible Power/Serial Clock Speed Management
No Pipeline Delays
High Speed Serial Interface SPI™/QSPI™/
MICROWIRE™/DSP Compatible
Shutdown Mode: 0.5 A Max
20-Lead TSSOP Package
GENERAL DESCRIPTION
The AD7927 is a 12-bit, high speed, low power, 8-channel,
successive-approximation ADC. The part operates from a single
2.7 V to 5.25 V power supply and features throughput rates up
to 200 kSPS. The part contains a low noise, wide bandwidth
track-and-hold amplifier that can handle input frequencies in
excess of 8 MHz.
The conversion process and data acquisition are controlled
using CS and the serial clock signal, allowing the device to
easily interface with microprocessors or DSPs. The input signal
is sampled on the falling edge of CS and the conversion is also
initiated at this point. There are no pipeline delays associated
with the part.
The AD7927 uses advanced design techniques to achieve very low
power dissipation at maximum throughput rates. At maximum
throughput rates, the AD7927 consumes 1.2 mA maximum
with 3 V supplies; with 5 V supplies, the current consumption is
1.5 mA maximum.
Through the configuration of the Control Register, the analog
input range for the part can be selected as 0 V to REFIN or 0 V to
2 ¥ REFIN, with either straight binary or twos complement output
coding. The AD7927 features eight single-ended analog inputs
with a channel sequencer to allow a preprogrammed selection of
channels to be converted sequentially.
The conversion time for the AD7927 is determined by the SCLK
frequency, as this is also used as the master clock to control the
conversion. The conversion time may be as short as 800 ns with
a 20 MHz SCLK.
REFIN
VIN0
•
•
•
•
•
•
•
•
•
•
•
•
•
VIN7
FUNCTIONAL BLOCK DIAGRAM
AVDD
T/H
I/P
MUX
12-BIT
SUCCESSIVE
APPROXIMATION
ADC
SEQUENCER
CONTROL LOGIC
AD7927
GND
SCLK
DOUT
DIN
CS
VDRIVE
PRODUCT HIGHLIGHTS
1. High Throughput with Low Power Consumption.
The AD7927 offers up to 200 kSPS throughput rates. At the
maximum throughput rate with 3 V supplies, the AD7927
dissipates 3.6 mW of power maximum.
2. Eight Single-Ended Inputs with a Channel Sequencer.
A consecutive sequence of channels, through which the ADC
will cycle and convert on, can be selected.
3. Single-Supply Operation with VDRIVE Function.
The AD7927 operates from a single 2.7 V to 5.25 V supply. The
VDRIVE function allows the serial interface to connect directly
to either 3 V or 5 V processor systems independent of AVDD.
4. Flexible Power/Serial Clock Speed Management.
The conversion rate is determined by the serial clock, allowing
the conversion time to be reduced through the serial clock
speed increase. The part also features various shutdown modes
to maximize power efficiency at lower throughput rates. Current
consumption is 0.5 mA maximum when in full shutdown.
5. No Pipeline Delay.
The part features a standard successive-approximation ADC
with accurate control of the sampling instant via a CS input
and once off conversion control.
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective companies.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703 © 2003 Analog Devices, Inc. All rights reserved.
1 page  
AD7927
ABSOLUTE MAXIMUM RATINGS1
(TA = 25∞C, unless otherwise noted.)
AVDD to AGND . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V
VDRIVE to AGND . . . . . . . . . . . . . . . . –0.3 V to AVDD + 0.3 V
Analog Input Voltage to AGND . . . . –0.3 V to AVDD + 0.3 V
Digital Input Voltage to AGND . . . . . . . . . . . . –0.3 V to +7 V
Digital Output Voltage to AGND . . . . . –0.3 V to AVDD + 0.3 V
REFIN to AGND . . . . . . . . . . . . . . . . –0.3 V to AVDD + 0.3 V
Input Current to Any Pin Except Supplies2 . . . . . . . . ± 10 mA
Operating Temperature Range
Commercial (B Version) . . . . . . . . . . . . . . –40∞C to +85∞C
Storage Temperature Range . . . . . . . . . . . –65∞C to +150∞C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . 150∞C
TSSOP Package, Power Dissipation . . . . . . . . . . . . . 450 mW
qJA Thermal Impedance . . . . . . . . . . . . . . 143∞C/W (TSSOP)
qJC Thermal Impedance . . . . . . . . . . . . . . . 45∞C/W (TSSOP)
Lead Temperature, Soldering
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . . 215∞C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220∞C
ESD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 kV
NOTES
1 Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only and functional operation of
the device at these or any other conditions above those listed in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
2 Transient currents of up to 100 mA will not cause SCR latch-up.
ORDERING GUIDE
Model
Temperature
Range
Linearity
Error (LSB)1
Package
Option
Package
Description
AD7927BRU
EVAL-AD7927CB2
EVAL-CONTROL BRD23
–40∞C to +85∞C
±1
RU-20
TSSOP
Evaluation Board
Controller Board
NOTES
1 Linearity error here refers to integral linearity error.
2 This can be used as a standalone evaluation board or in conjunction with the Evaluation Controller Board for evaluation/demonstration purposes.
3 This board is a complete unit allowing a PC to control and communicate with all Analog Devices evaluation boards ending in the CB designators.
To order a complete evaluation kit, you will need to order the particular ADC evaluation board, e.g., EVAL-AD7927CB, the EVAL-CONTROL
BRD2, and a 12 V ac transformer. See the relevant Evaluation Board Application Note for more information.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although the
AD7927 features proprietary ESD protection circuitry, permanent damage may occur on devices
subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended
to avoid performance degradation or loss of functionality.
REV. 0
–5–
5 Page 
AD7927
SHADOW REGISTER
The Shadow Register on the AD7927 is a 16-bit, write-only
register. Data is loaded from the DIN pin of the AD7927 on the
falling edge of SCLK. The data is transferred on the DIN line at
the same time that a conversion result is read from the part. This
requires 16 serial clock falling edges for the data transfer. The
information is clocked into the Shadow Register, provided that the
SEQ and SHADOW bits were set to 0,1, respectively, in the
previous write to the Control Register. MSB denotes the first bit
in the data stream. Each bit represents an analog input from
Channel 0 to Channel 7. Through programming the Shadow
Register, two sequences of channels may be selected, through
which the AD7927 will cycle with each consecutive conversion
after the write to the Shadow Register. Sequence One will be
performed first and then Sequence Two. If the user does not
wish to preform a second sequence option, then all 0s must be
written to the last eight LSBs of the Shadow Register. To select
a sequence of channels, the associated channel bit must be set for
each analog input. The AD7927 will continuously cycle through
the selected channels in ascending order, beginning with the
lowest channel, until a write operation occurs (i.e., the WRITE bit
is set to 1) with the SEQ and SHADOW bits configured in any
way except 1,0. (See Table IV.) The bit functions are outlined
in Table V.
MSB
VIN0 VIN1 VIN2
VIN3
VIN4
Table V. Shadow Register Bit Functions
VIN5 VIN6 VIN7 VIN0 VIN1 VIN2
VIN3
VIN4
VIN5
LSB
VIN6 VIN7
------------------SEQUENCE ONE-------------------------------------------------------SEQUENCE TWO-----------------------
POWER-ON
DUMMY CONVERSION
DIN = ALL 1s
POWER-ON
DUMMY CONVERSION
DIN = ALL 1s
DIN: WRITE TO CONTROL REGISTER,
CS
WRITE BIT = 1,
SELECT CODING, RANGE, AND POWER MODE.
SELECT CHANNEL A2–A0 FOR CONVERSION.
SEQ = SHADOW = 0
DIN: WRITE TO CONTROL REGISTER,
CS
WRITE BIT = 1,
SELECT CODING, RANGE, AND POWER MODE.
SELECT CHANNEL A2–A0 FOR CONVERSION.
SEQ = 0 SHADOW = 1
DOUT: CONVERSION RESULT FROM PREVIOUSLY
SELECTED CHANNEL A2–A0.
CS
DIN: WRITE TO CONTROL REGISTER,
WRITE BIT = 1,
SELECT CODING, RANGE, AND POWER MODE.
WRITE BIT = 1,
SEQ = SHADOW = 0
SELECT A2–A0 FOR CONVERSION.
SEQ = SHADOW = 0
Figure 2. SEQ Bit = 0, SHADOW Bit = 0 Flowchart
Figure 2 reflects the traditional operation of a multichannel ADC,
where each serial transfer selects the next channel for conversion.
In this mode of operation, the sequencer function is not used.
Figure 3 shows how to program the AD7927 to continuously
convert on a particular sequence of channels. To exit this mode
of operation and revert back to the traditional mode of operation
of a multichannel ADC (as outlined in Figure 2), ensure that the
WRITE bit = 1 and the SEQ = SHADOW = 0 on the next serial
transfer. Figure 4 shows how a sequence of consecutive chan-
nels can be converted on without having to program the Shadow
Register or write to the part on each serial transfer. Again, to exit
this mode of operation and revert back to the traditional mode
of operation of a multichannel ADC (as outlined in Figure 2),
ensure the WRITE bit = 1 and the SEQ = SHADOW = 0 on
the next serial transfer.
DOUT: CONVERSION RESULT FROM PREVIOUSLY
CS SELECTED CHANNEL A2–A0.
DIN: WRITE TO SHADOW REGISTER, SELECTING
WHICH CHANNELS TO CONVERT ON; CHANNELS
SELECTED NEED NOT BE CONSECUTIVE CHANNELS
WRITE BIT = 0
WRITE BIT = 1
SEQ = 1 SHADOW = 0
CONTINUOUSLY
CONTINUOUSLY
CS
CONVERTS ON THE
SELECTED
CONVERTS ON THE
SELECTED
SEQUENCE OF
SEQUENCE OF
CHANNELS
CHANNELS BUT
WILL ALLOW RANGE,
CODING, AND SO ON,
TO CHANGE IN THE
WRITE BIT = 0
CONTROL REGISTER
WITHOUT INTERRUPT-
WRITE BIT = 0
ING THE SEQUENCE,
PROVIDED SEQ = 1
SHADOW = 0
WRITE BIT = 1,
SEQ = 1,
SHADOW = 0
Figure 3. SEQ Bit = 0, SHADOW Bit = 1 Flowchart
REV. 0
–11–
11 Page | ||
| Páginas | Total 21 Páginas | |
| PDF Descargar | [ Datasheet AD7927.PDF ] | |
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