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PDF AD7720 Data sheet ( Hoja de datos )
| Número de pieza | AD7720 | |
| Descripción | CMOS Sigma-Delta Modulator | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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a
CMOS Sigma-Delta Modulator
AD7720
FEATURES
12.5 MHz Master Clock Frequency
0 V to +2.5 V or ؎1.25 V Input Range
Single Bit Output Stream
90 dB Dynamic Range
Power Supplies: AVDD, DVDD: +5 V ؎ 5%
On-Chip 2.5 V Voltage Reference
28-Lead TSSOP
FUNCTIONAL BLOCK DIAGRAM
AVDD AGND DVDD DGND REF1
VIN(+)
VIN(–)
AD7720
SIGMA-DELTA
MODULATOR
2.5V
REFERENCE
REF2
DATA
SCLK
MZERO
GC
GENERAL DESCRIPTION
This device is a 7th order sigma-delta modulator that converts
the analog input signal into a high speed 1-bit data stream. The
part operates from a +5 V supply and accepts a differential input
range of 0 V to +2.5 V or ± 1.25 V centered about a common-
mode bias. The analog input is continuously sampled by the
analog modulator, eliminating the need for external sample and
hold circuitry. The input information is contained in the output
stream as a density of ones. The original information can be
reconstructed with an appropriate digital filter.
The part provides an accurate on-chip 2.5 V reference. A refer-
ence input/output function is provided to allow either the inter-
nal reference or an external system reference to be used as the
reference source for the part.
The device is offered in a 28-lead TSSOP package and designed
to operate from –40°C to +85°C.
BIP
STBY
CONTROL
LOGIC
CLOCK
CIRCUITRY
XTAL1/MCLK
XTAL2
DVAL
RESETO
RESET
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 1997
1 page  
ABSOLUTE MAXIMUM RATINGS1
(TA = +25°C unless otherwise noted)
DVDD to DGND . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V
AVDD to AGND . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V
AVDD to DVDD . . . . . . . . . . . . . . . . . . . . –0.3 V to +0.3 V
AGND to DGND . . . . . . . . . . . . . . . . . . . . –0.3 V to +0.3 V
Digital Input Voltage to DGND . . –0.3 V to DVDD + 0.3 V
Analog Input Voltage to AGND . . . –0.3 V to AVDD + 0.3 V
Input Current to Any Pin Except Supplies2 . . . . . . . ± 10 mA
Operating Temperature Range
Industrial (B Version) . . . . . . . . . . . . . . . –40°C to +85°C
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Maximum Junction Temperature . . . . . . . . . . . . . . . +150°C
TSSOP Package
θJA Thermal Impedance . . . . . . . . . . . . . . . . . . . . 120°C/W
Lead Temperature, Soldering
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . +215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . +220°C
NOTES
1Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
2Transient currents of up to 100 mA will not cause SCR latchup.
AD7720
PIN CONFIGURATION
REF2 1
28 AVDD
AGND 2
27 REF1
NC 3
26 AGND
STBY 4
25 AVDD
DVAL 5
24 AGND
DGND
GC
BIP
6 23
AD7720
7 TOP VIEW 22
8 (Not to Scale) 21
VIN(+)
RESET
VIN(–)
MZERO 9
20 AGND
DATA 10
19 DVDD
SCLK 11
18 AGND
RESETO 12
17 XTAL2
NC 13
16 XTAL1/MCLK
AGND 14
15 DGND
NC = NO CONNECT
Model
AD7720BRU
ORDERING GUIDE
Temperature
Range
–40°C to +85°C
Package
Description
28-Lead Thin Shrink Small Outline
Package
Option
RU-28
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD7720 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
REV. 0
–5–
5 Page 
AD7720
R
100⍀
R
100⍀
C
2.7nF
C
2.7nF
C
2.7nF
VIN(+)
VIN(–)
Figure 24. Differential Input with Antialiasing
A capacitor between the two input pins sources or sinks charge
to allow most of the charge that is needed by one input to be
effectively supplied by the other input. This minimizes undesir-
able charge transfer from the analog inputs to and from ground.
The series resistor isolates the operational amplifier from the
current spikes created during the sampling process and provides
a pole for antialiasing. The 3 dB cutoff frequency (f3 dB) of the
antialias filter is given by Equation 1, and the attenuation of the
filter is given by Equation 2.
f3 dB = 1/(2 π REXT CEXT)
(1)
( ) 2
Attenuation = 20 log 1/ 1+ f / f 3dB
(2)
The choice of the filter cutoff frequency will depend on the
amount of roll off that is acceptable in the passband of the
digital filter and the required attenuation at the first image
frequency.
The capacitors used for the input antialiasing circuit must have
low dielectric absorption to avoid distortion. Film capacitors
such as Polypropylene, Polystyrene or Polycarbonate are suitable.
If ceramic capacitors are used, they must have NPO dielectric.
Applying the Reference
The reference circuitry used in the AD7720 includes an on-chip
+2.5 V bandgap reference and a reference buffer circuit. The
block diagram of the reference circuit is shown in Figure 25.
The internal reference voltage is connected to REF1 via a
3 kΩ resistor and is internally buffered to drive the analog
modulator’s switched capacitor DAC (REF2). When using the
internal reference, connect 100 nF between REF1 and AGND.
If the internal reference is required to bias external circuits, use
an external precision op amp to buffer REF1.
1V
REF1
100nF
REF2
COMPARATOR
REFERENCE
BUFFER
3k⍀
2.5V
REFERENCE
SWITCHED-CAP
DAC REF
The AD7720 can operate with its internal reference or an external
reference can be applied in two ways. An external reference can
be connected to REF1, overdriving the internal reference. How-
ever, there will be an error introduced due to the offset of the
internal buffer amplifier. For lowest system gain errors when
using an external reference, REF1 is grounded (disabling the
internal buffer) and the external reference is connected to REF2.
In all cases, since the REF2 voltage connects to the analog
modulator, a 220 nF capacitor must connect directly from
REF2 to AGND. The external capacitor provides the charge
required for the dynamic load presented at the REF2 pin
(Figure 26).
REF2
220nF
⌽A
4pF
⌽B
4pF
⌽B
⌽A
SWITCHED-CAP
DAC REF
MCLK
⌽A ⌽B ⌽A ⌽B
Figure 26. REF2 Equivalent Circuit
The AD780 is ideal to use as an external reference with the
AD7720. Figure 27 shows a suggested connection diagram.
+5V
1F
22nF
1 NC
O/P
SELECT
8
2 +VIN
NC 7
3 TEMP VOUT 6
4 GND TRIM 5
AD780
220nF
22F
REF2
REF1
Figure 27. External Reference Circuit Connection
Input Circuits
Figures 28 and 29 show two simple circuits for bipolar mode
operation. Both circuits accept a single-ended bipolar signal
source and create the necessary differential signals at the input
to the ADC.
The circuit in Figure 28 creates a 0 V to 2.5 V signal at the
VIN(+) pin to form a differential signal around an initial bias
voltage of 1.25 V. For single-ended applications, best THD
performance is obtained with VIN(–) set to 1.25 V rather than
2.5 V. The input to the AD7720 can also be driven differen-
tially with a complementary input as shown in Figure 29.
In this case, the input common-mode voltage is set to 2.5 V.
The 2.5 V p-p full-scale differential input is obtained with a
1.25 V p-p signal at each input in antiphase. This configuration
minimizes the required output swing from the amplifier circuit
and is useful for single supply applications.
Figure 25. Reference Circuit Block Diagram
REV. 0
–11–
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet AD7720.PDF ] | |
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