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PDF AD7666 Data sheet ( Hoja de datos )

Número de pieza AD7666
Descripción 16-Bit 1 MSPS SAR Unipolar ADC with Ref
Fabricantes Analog Devices 
Logotipo Analog Devices Logotipo



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PRELIMINARY TECHNICAL DATA
a 16-Bit 500 kSPS SAR Unipolar ADC with Ref
Preliminary Technical Data
AD7666*
FEATURES
Throughput: 500 kSPS
INL: ±2.5 LSB Max (±0.0038% of Full Scale)
16 Bits Resolution with No Missing Codes
Analog Input Voltage Range: 0 V to 2.5 V
No Pipeline Delay
Parallel and Serial 5 V/3 V Interface
SPITM/QSPITM/MICROWIRETM/DSP Compatible
Single 5 V Supply Operation
Power Dissipation
67 mW Typ without REF, 77 mW Typ with REF
15 W @ 100 SPS
Power-Down Mode: 7 W Max
Package: 48-Lead Quad Flat Pack (LQFP);
48-Lead Chip Scale Package (LFCSP)
Pin-to-Pin Compatible with PulSAR ADCs
APPLICATIONS
Data Acquisition
Instrumentation
Digital Signal Processing
Spectrum Analysis
Medical Instruments
Battery-Powered Systems
Process Control
FUNCTIONAL BLOCK DIAGRAM
AGND
AVDD
IN
INGND
PDREF
PDBUF
PD
RESET
REFBUFIN REF REFGND
2.5 V REF
AD7666
SWITCHED
CAP DAC
CLOCK
CONTROL LOGIC AND
CALIBRATION CIRCUITRY
CNVST
DVDD DGND
SERIAL
PORT
16
PARALLEL
INTERFACE
OVDD
OGND
DATA[15:0]
BUSY
RD
CS
SER/PAR
OB/2C
BYTESWAP
Type / kSPS
Pseudo
Differential
True Bipolar
True
Differential
PulSAR Selection
100 - 250
AD7651
AD7660/61
AD7663
AD7675
500 - 570
AD7650/52
AD7664/66
AD7665
AD7676
1000
AD7653
AD7667
AD7671
AD7677
GENERAL DESCRIPTION
The AD7666 is a 16-bit, 500 kSPS, charge redistribution
SAR, analog-to-digital converter that operates from a single 5
V power supply. The part contains a high-speed 16-bit sam-
pling ADC, an internal conversion clock, internal reference,
error correction circuits, and both serial and parallel system
interface ports.
It is fabricated using Analog Devices’ high-performance, 0.6
micron CMOS process, with correspondingly low cost and is
available in a 48-lead LQFP and a tiny 48-lead LFCSP with
operation specified from –40°C to +85°C.
*Patent pending.
SPI and QSPI are trademarks of Motorola Inc.
MICROWIRE ia a trademark of National Semiconductor Corporation
REV. Pr B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
PRODUCT HIGHLIGHTS
1. Fast Throughput
The AD7666 is a 500 kSPS, charge redistribution, 16-bit
SAR ADC with internal error correction circuitry.
2. Internal Reference
The AD7666 has an internal reference and allows for an
external reference to be used.
3. Superior INL
The AD7666 has a maximum integral nonlinearity of 2.5
LSB with no missing 16-bit code.
4. Single-Supply Operation
The AD7666 operates from a single 5 V supply and dissipates
a typical of 67 mW. Its power dissipation decreases with
throughput. It consumes 7 µW maximum when in power-
down.
5. Serial or Parallel Interface
Versatile parallel or 2-wire serial interface arrangement
compatible with both 3 V or 5 V logic.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2002

1 page




AD7666 pdf
PRELIMINARY TECHNICAL DATA
AD7666
ABSOLUTE MAXIMUM RATINGS*
IN2, TEMP2,REF, REFBUFIN, INGND, REFGND to AGND
. . . . . . . . . . . . . . . . . . . . . . . AVDD + 0.3 V to AGND – 0.3 V
Ground Voltage Differences
AGND, DGND, OGND . . . . . . . . . . . . . . . . . . . . . ±0.3 V
Supply Voltages
AVDD, DVDD, OVDD . . . . . . . . . . . . . . . -0.3V to +7 V
AVDD to DVDD, AVDD to OVDD . . . . . . . . . . . . . ±7 V
DVDD to OVDD . . . . . . . . . . . . . . . . . . . . -0.3V to +7 V
Digital Inputs . . . . . . . . . . . . . . . . –0.3 V to DVDD + 3.0 V
Internal Power Dissipation3 . . . . . . . . . . . . . . . . . . . 700 mW
Internal Power Dissipation4 . . . . . . . . . . . . . . . . . . . . . 2.5 W
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Lead Temperature Range
(Soldering 10 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . 300°C
NOTES
1Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
2See Analog Input section.
3Specification is for the device in free air:
48-Lead LQFP; θJA = 91°C/W, θJC = 30°C/W
4Specification is for the device in free air:
48-Lead LFCSP; θJA = 26°C/W
1.6mA IOL
TO OUTPUT
PIN CL
60pF*
500A IOH
1.4V
*IN SERIAL INTERFACE MODES, THE SYNC, SCLK, AND
SDOUT TIMINGS ARE DEFINED WITH A MAXIMUM LOAD
CL OF 10pF; OTHERWISE, THE LOAD IS 60pF MAXIMUM.
Figure 1. Load Circuit for Digital Interface Timing,
SDOUT, SYNC, SCLK Outputs, CL = 10 pF
0.8V
t DELAY
2V
0.8V
2V
t DELAY
2V
0.8V
Figure 2. Voltage Reference Levels for Timing
ORDERING GUIDE
Model
Temperature
Range
Package Description
Package Option
AD7666AST
AD7666ASTRL
AD7666ACP
AD7666ACPRL
EVAL-AD7666CB1
EVAL-CONTROL BRD22
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
Quad Flatpack (LQFP)
Quad Flatpack (LQFP)
Chip Scale (LFCSP)
Chip Scale (LFCSP)
ST-48
ST-48
CP-48
CP-48
Evaluation Board
Controller Board
NOTES
1This board can be used as a standalone evaluation board or in conjunction with the EVAL-CONTROL BRD2 for evaluation/demonstration purposes.
2This board allows a PC to control and communicate with all Analog Devices evaluation boards ending in the CB designators.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
WARNING!
the AD7666 features proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
ESD SENSITIVE DEVICE
REV. Pr B
–5–

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AD7666 arduino
PRELIMINARY TECHNICAL DATA
AD7666
0
-20
-40
-60 TO BE
-80 SUPPLIED
-100
-120
-140
-160
1
TPC 7. SNR, S/(N+D), and ENOB vs. Frequency
0
-20
-40
-60 TO BE
-80 SUPPLIED
-100
-120
-140
-160
1
TPC 10. THD, Harmonics, and SFDR vs. Frequency
0
-20
-40
-60 TO BE
-80 SUPPLIED
-100
-120
-140
-160
1
TPC 8. SNR and S/(N+D) vs. Input Level
(Referred to Full Scale)
0
-20
-40
-60 TO BE
-80 SUPPLIED
-100
-120
-140
-160
1
TPC 11. Typical Delay vs. Load Capacitance CL
0
-20
-40
-60 TO BE
-80 SUPPLIED
-100
-120
-140
-160
1
TPC 9. Operating Currents vs. Sample Rate
0
-20
-40
-60 TO BE
-80 SUPPLIED
-100
-120
-140
-160
1
TPC 12. Power-Down Operating Currents vs. Temperature
REV. Pr B
–11–

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