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PDF AD766 Data sheet ( Hoja de datos )

Número de pieza AD766
Descripción 16-Bit DSP DACPORT
Fabricantes Analog Devices 
Logotipo Analog Devices Logotipo



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a
16-Bit
DSP DACPORT
AD766
FEATURES
Zero-Chip Interface to Digital Signal Processors
Complete DACPORT®
On-Chip Voltage Reference
Voltage and Current Outputs
Serial, Twos-Complement Input
؎3 V Output
Sample Rates to 390 kSPS
94 dB Minimum Signal-to-Noise Ratio
–81 dB Maximum Total Harmonic Distortion
15-Bit Monotonicity
؎5 V to ؎12 V Operation
16-Pin Plastic and Ceramic Packages
Available in Commercial, Industrial, and Military
Temperature Ranges
APPLICATIONS
Digital Signal Processing
Noise Cancellation
Radar Jamming
Automatic Test Equipment
Precision Industrial Equipment
Waveform Generation
PRODUCT DESCRIPTION
The AD766 16-bit DSP DACPORT provides a direct, three-
wire interface to the serial ports of popular DSP processors, in-
cluding the ADSP-2101, TMS320CXX, and DSP56001. No
additional “glue logic” is required. The AD766 is also com-
plete, offering on-chip serial-to-parallel input format conver-
sion, a 16-bit current-steering DAC, voltage reference, and a
voltage output op amp. The AD766 is fabricated in Analog
Devices’ BiMOS II mixed-signal process which provides bipolar
transistors, MOS transistors, and thin-film resistors for preci-
sion analog circuits in addition to CMOS devices for logic.
The design and layout of the AD766 have been optimized for ac
performance and are responsible for its guaranteed and tested
94 dB signal-to-noise ratio to 20 kHz and 79 dB SNR to
250 kHz. Laser-trimming the AD766’s silicon chromium thin-
film resistors reduces total harmonic distortion below –81 dB
(at 1 kHz), a specification also production tested. An optional
linearity trim pin allows elimination of midscale differential
linearity error for even lower THD with small signals.
The AD766’s output amplifier provides a ± 3 V signal with a
high slew rate, small glitch, and fast settling. The output ampli-
fier is short circuit protected and can withstand indefinite shorts
to ground.
DACPORT is a registered trademark of Analog Devices, Inc.
FUNCTIONAL BLOCK DIAGRAM
The serial interface consists of bit clock, data, and latch enable
inputs. The twos-complement data word is clocked MSB first
on falling clock edges into the serial-to-parallel converter, con-
sistent with the serial protocols of popular DSP processors. The
input clock can support data transfers up to 12.5 MHz. The
falling edge of latch enable updates the internal DAC input reg-
ister at the sample rate with the sixteen bits most recently
clocked into the serial input register.
The AD766 operates over a ± 5 V to ± 12 V power supply range.
The digital supplies, +VL and –VL, can be separated from the
analog signal supplies, +VS and –VS, for reduced digital
crosstalk. Separate analog and digital ground pins are also pro-
vided. An internal bandgap reference provides a precision volt-
age source to the output amp that is stable over temperature and
time.
Power dissipation is typically 120 mW with ± 5 V supplies and
300 mW with ± 12 V. The AD766 is available in commercial
(0°C to +70°C), industrial (–40°C to +85°C), and military
(–55°C to +125°C) grades. Commercial and industrial grade
parts are available in a 16-pin plastic DIP; military parts pro-
cessed to MIL-STD-883B are packaged in a 16-pin ceramic
DIP. See Analog Devices’ Military Products Databook or current
military data sheet for specifications for the military version.
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
Fax: 617/326-8703

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AD766 pdf
Analog Circuit Considerations–AD766
For applications requiring broader bandwidths and/or even
lower noise than that afforded by the AD766’s internal op amp,
an external op amp can easily by used in its place. IOUT (Pin 13)
drives the negative (inverting) input terminal of the external op
amp, and its external voltage output is connected to the feed-
back resistor pin, RF (Pin 10). To insure that the AD766’s un-
used internal op amp remains in a closed-loop configuration,
VOUT (Pin 9) should be tied to the summing junction pin, SJ
(Pin 11).
As an example, Figure 3 shows the AD766 using the AD744 op
amp as an external current-to-voltage converter. In this invert-
ing configuration, the AD744 will provide the same ± 3 V out-
put as the internal op amp would have. Other recommended
amplifiers include the AD845 and AD846. Note that a single
pole of low-pass filtering could also be attained with this circuit
simply by adding a capacitor in parallel with the feedback resis-
tor as just shown in Figure 1.
Figure 3. External Op Amp Connections
Residual DAC differential linearity error around midscale can
be externally trimmed out, improving THD beyond the
AD766’s guaranteed tested specifications. This error is most
significant with low-amplitude signals because the ratio of the
midscale linearity error to the signal amplitude is greatest in this
case, thereby increasing THD. The MSB adjust circuitry shown
in Figure 4 can be used for improving THD with low-level sig-
nals. Otherwise, the AD766 will operate to its specifications
with MSB ADJ (Pin 14) and TRIM (Pin 15) unconnected.
Figure 4. Optional MSB Adjustment Circuit
ANALOG CIRCUIT CONSIDERATIONS
GROUNDING RECOMMENDATIONS
The AD766 has two ground pins, designated AGND (analog
ground) and DGND (digital ground). The analog ground pin is
the “high-quality” ground reference point for the device. The
analog ground pin should be connected to the analog common
point in the system. The output load should also be connected
to that same point.
The digital ground pin returns ground current from the digital
logic portions of the AD766 circuitry. This pin should be con-
nected to the digital common point in the system.
As illustrated in Figure 5, the analog and digital grounds should
be connected together at one point in the system.
Figure 5. Recommended Circuit Schematic
POWER SUPPLIES AND DECOUPLING
The AD766 has four power supply input pins. ± VS provide the
supply voltages to operate the linear portions of the DAC in-
cluding the voltage reference, output amplifier and control am-
plifier. The ± VS supplies are designed to operate from ± 5 V to
± 12 V.
The ± VL supplies operate the digital portions of the chip, in-
cluding the input shift register and the input latching circuitry.
The ± VL supplies are also designed to operate from ± 5 V to
± 12 V. To assure freedom from latch-up, –VL should never go
more negative than –VS.
Special restrictions on power supplies apply to extended tem-
perature range versions of the AD766 that do not apply to the
commercial AD766J. First, supplies must be symmetric. That is,
+VS = ͉–VS͉ and +VL = ͉–VL͉. Each supply must independently
meet this equality within ± 5%. Since we require that –VS –VL
to guarantee latch-up immunity, this symmetry principle implies
that the positive analog supply must be greater than or equal to
the positive digital supply, i.e., VS –VL for extended-temper-
ature range parts. In other words, the digital supply range must
be inside the analog supply range. Second, the internal op amp’s
performance in generating voltage outputs is only guaranteed if
+VS 7 V (and –VS –7 V, by the symmetry principle). These
constraints do not apply to the AD766J.
Decoupling capacitors should be used on all power supply pins.
Furthermore, good engineering practice suggests that these ca-
pacitors be placed as close as possible to the package pins as
well as the common points. The logic supplies, ± VL, should be
decoupled to digital common; and the analog supplies, ± VS,
should be decoupled to analog common.
The use of four separate power supplies will reduce feedthrough
from the digital portion of the system to the linear portions of
the system, thus contributing to the performance as tested.
However, four separate voltage supplies are not necessary for
good circuit performance. For example, Figure 6 illustrates a
REV. A
–5–

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