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PDF AD9708 Data sheet ( Hoja de datos )
| Número de pieza | AD9708 | |
| Descripción | 8-Bit/ 100 MSPS TxDAC D/A Converter | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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a
8-Bit, 100 MSPS+
TxDAC® D/A Converter
AD9708*
FEATURES
Member of Pin-Compatible TxDAC Product Family
125 MSPS Update Rate
8-Bit Resolution
Linearity: 1/4 LSB DNL
Linearity: 1/4 LSB INL
Differential Current Outputs
SINAD @ 5 MHz Output: 50 dB
Power Dissipation: 175 mW @ 5 V to 45 mW @ 3 V
Power-Down Mode: 20 mW @ 5 V
On-Chip 1.20 V Reference
Single +5 V or +3 V Supply Operation
Packages: 28-Lead SOIC and 28-Lead TSSOP
Edge-Triggered Latches
Fast Settling: 35 ns Full-Scale Settling to 0.1%
APPLICATIONS
Communications
Signal Reconstruction
Instrumentation
PRODUCT DESCRIPTION
The AD9708 is the 8-bit resolution member of the TxDAC
series of high performance, low power CMOS digital-to-analog
converters (DACs). The TxDAC family, which consists of pin
compatible 8-, 10-, 12-, and 14-bit DACs, was specifically opti-
mized for the transmit signal path of communication systems. All
of the devices share the same interface options, small outline
package and pinout, thus providing an upward or downward
component selection path based on performance, resolution and
cost. The AD9708 offers exceptional ac and dc performance
while supporting update rates up to 125 MSPS.
The AD9708’s flexible single-supply operating range of +2.7 V
to +5.5 V and low power dissipation are well suited for portable
and low power applications. Its power dissipation can be
further reduced to 45 mW, without a significant degradation in
performance, by lowering the full-scale current output. In addi-
tion, a power-down mode reduces the standby power dissipa-
tion to approximately 20 mW.
The AD9708 is manufactured on an advanced CMOS process.
A segmented current source architecture is combined with a
proprietary switching technique to reduce spurious components
and enhance dynamic performance. Edge-triggered input latches
and a temperature compensated bandgap reference have been inte-
grated to provide a complete monolithic DAC solution. Flexible
supply options support +3 V and +5 V CMOS logic families.
The AD9708 is a current-output DAC with a nominal full-scale
output current of 20 mA and > 100 kΩ output impedance.
TxDAC is a registered trademark of Analog Devices, Inc.
*Patent pending.
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
FUNCTIONAL BLOCK DIAGRAM
+5V
0.1F
0.1F
REFLO
+1.20V REF
REF IO
COMP1
50pF
RSET
+5V
CLOCK
FS ADJ
DVDD
DCOM
CLOCK
SLEEP
AVDD ACOM
AD9708
CURRENT
SOURCE
ARRAY
COMP2 0.1F
SEGMENTED
SWITCHES
LATCHES
IOUTA
IOUTB
DIGITAL DATA INPUTS (DB7–DB0)
Differential current outputs are provided to support single-
ended or differential applications. The current outputs may be
directly tied to an output resistor to provide two complemen-
tary, single-ended voltage outputs. The output voltage compliance
range is 1.25 V.
The AD9708 contains a 1.2 V on-chip reference and reference
control amplifier, which allows the full-scale output current to
be simply set by a single resistor. The AD9708 can be driven by
a variety of external reference voltages. The AD9708’s full-scale
current can be adjusted over a 2 mA to 20 mA range without
any degradation in dynamic performance. Thus, the AD9708
may operate at reduced power levels or be adjusted over a 20 dB
range to provide additional gain ranging capabilities.
The AD9708 is available in 28-lead SOIC and 28-lead TSSOP
packages. It is specified for operation over the industrial tem-
perature range.
PRODUCT HIGHLIGHTS
1. The AD9708 is a member of the TxDAC product family, which
provides an upward or downward component selection path
based on resolution (8 to 14 bits), performance and cost.
2. Manufactured on a CMOS process, the AD9708 uses a pro-
prietary switching technique that enhances dynamic perfor-
mance well beyond 8- and 10-bit video DACs.
3. On-chip, edge-triggered input CMOS latches readily interface
to +3 V and +5 V CMOS logic families. The AD9708 can
support update rates up to 125 MSPS.
4. A flexible single-supply operating range of +2.7 V to +5.5 V
and a wide full-scale current adjustment span of 2 mA to
20 mA allows the AD9708 to operate at reduced power levels
(i.e., 45 mW) without any degradation in dynamic performance.
5. A temperature compensated, 1.20 V bandgap reference is
included on-chip providing a complete DAC solution. An
external reference may be used.
6. The current output(s) of the AD9708 can easily be config-
ured for various single-ended or differential applications.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 1999
1 page  
AD9708
DEFINITIONS OF SPECIFICATIONS
Linearity Error (Also Called Integral Nonlinearity or INL)
Linearity error is defined as the maximum deviation of the
actual analog output from the ideal output, determined by a
straight line drawn from zero to full scale.
Differential Nonlinearity (or DNL)
DNL is the measure of the variation in analog value, normalized
to full scale, associated with a 1 LSB change in digital input code.
Monotonicity
A D/A converter is monotonic if the output either increases or
remains constant as the digital input increases.
Offset Error
The deviation of the output current from the ideal of zero is
called offset error. For IOUTA, 0 mA output is expected when
the inputs are all 0s. For IOUTB, 0 mA output is expected
when all inputs are set to 1s.
Gain Error
The difference between the actual and ideal output span. The
actual span is determined by the output when all inputs are set
to 1s minus the output when all inputs are set to 0s.
Output Compliance Range
The range of allowable voltage at the output of a current-output
DAC. Operation beyond the maximum compliance limits may
cause either output stage saturation or breakdown resulting in
nonlinear performance.
Temperature Drift
Temperature drift is specified as the maximum change from the
ambient (+25°C) value to the value at either TMIN or TMAX. For
offset and gain drift, the drift is reported in ppm of full-scale
range (FSR) per degree C. For reference drift, the drift is
reported in ppm per degree C.
Power Supply Rejection
The maximum change in the full-scale output as the supplies
are varied from nominal to minimum and maximum specified
voltages.
Settling Time
The time required for the output to reach and remain within a
specified error band about its final value, measured from the
start of the output transition.
Glitch Impulse
Asymmetrical switching times in a DAC give rise to undesired
output transients that are quantified by a glitch impulse. It is
specified as the net area of the glitch in pV-s.
Spurious-Free Dynamic Range
The difference, in dB, between the rms amplitude of the output
signal and the peak spurious signal over the specified bandwidth.
Signal-to-Noise and Distortion (S/N+D, SINAD) Ratio
S/N+D is the ratio of the rms value of the measured output
signal to the rms sum of all other spectral components below the
Nyquist frequency, including harmonics but excluding dc. The
value for S/N+D is expressed in decibels.
Total Harmonic Distortion
THD is the ratio of the rms sum of the first six harmonic
components to the rms value of the measured output signal. It is
expressed as a percentage or in decibels (dB).
+5V
0.1F
DVDD
DCOM
REFLO
+1.20V REF
0.1F
REF IO
RSET
2k⍀
+5V
FS ADJ
DVDD
DCOM
CLOCK
RETIMED
CLOCK
OUTPUT*
50⍀
LECROY 9210
PULSE GENERATOR
SLEEP
CLOCK
OUTPUT
COMP1
50pF
AVDD ACOM
AD9708
CURRENT
SOURCE
ARRAY
COMP2
SEGMENTED
SWITCHES
LATCHES
IOUTA
IOUTB
DIGITAL
DATA
TEKTRONIX
AWG-2021
50⍀
0.1F
50⍀
20pF
20pF
TO HP3589A
SPECTRUM/
NETWORK
ANALYZER
50⍀ INPUT
* AWG2021 CLOCK RETIMED
SUCH THAT DIGITAL DATA
TRANSITIONS ON FALLING EDGE
OF 50% DUTY CYCLE CLOCK.
Figure 2. Basic AC Characterization Test Setup
REV. B
–5–
5 Page 
AD9708
should be considered. The necessity and value of this resistor
will be dependent upon the logic family used.
For a more detailed discussion of the implementation and
construction of high speed, mixed signal printed circuit boards,
refer to Analog Devices’ application notes AN-280 and AN-333.
DIFFERENTIAL OUTPUT CONFIGURATIONS
For applications requiring the optimum dynamic performance
and/or a bipolar output swing, a differential output configura-
tion is suggested. A differential output configuration may con-
sists of either an RF transformer or a differential op amp
configuration. The transformer configuration is well suited for
ac coupling applications. It provides the optimum high fre-
quency performance due to its excellent rejection of common-
mode distortion (i.e., even-order harmonics) and noise over a
wide frequency range. It also provides electrical isolation and
the ability to deliver twice the power to the load (i.e., assuming
no source termination). The differential op amp configuration is
suitable for applications requiring dc coupling, a bipolar output,
signal gain, and/or level shifting.
Figure 23 shows the AD9708 in a typical transformer coupled
output configuration. The center-tap on the primary side of the
transformer must be connected to ACOM to provide the necessary
dc current path for both IOUTA and IOUTB. The complemen-
tary voltages appearing at IOUTA and IOUTB (i.e., VOUTA and
VOUTB) swing symmetrically around ACOM and should be
maintained within the specified output compliance range of the
AD9708. A differential resistor, RDIFF, may be inserted in
applications in which the output of the transformer is connected
to the load, RLOAD, via a passive reconstruction filter or cable.
RDIFF is determined by the transformer’s impedance ratio and
provides the proper source termination. Note that approxi-
mately half the signal power will be dissipated across RDIFF.
IOUTA 22
AD9708
IOUTB 21
MINI-CIRCUITS
T1-1T
RLOAD
OPTIONAL RDIFF
Figure 23. Differential Output Using a Transformer
An op amp can also be used to perform a differential to single-
ended conversion as shown in Figure 24. The AD9708 is
configured with two equal load resistors, RLOAD, of 25 Ω. The
differential voltage developed across IOUTA and IOUTB is
converted to a single-ended signal via the differential op amp
configuration. An optional capacitor can be installed across
IOUTA and IOUTB forming a real pole in a low-pass filter.
The addition of this capacitor also enhances the op amps distortion
performance by preventing the DACs high slewing output from
overloading the op amp’s input.
AD9708
IOUTA 22
IOUTB 21
COPT
225⍀
225⍀
25⍀
25⍀
500⍀
AD8072
500⍀
Figure 24. DC Differential Coupling Using an Op Amp
The common-mode rejection of this configuration is typically
determined by the resistor matching. In this circuit, the differ-
ential op amp circuit is configured to provide some additional
signal gain. The op amp must operate off a dual supply since its
output is approximately ± 1.0 V. A high speed amplifier capable
of preserving the differential performance of the AD9708 while
meeting other system level objectives (i.e., cost, power) should
be selected. The op amps differential gain, its gain setting resis-
tor values and full-scale output swing capabilities should all be
considered when optimizing this circuit.
The differential circuit shown in Figure 25 provides the neces-
sary level-shifting required in a single supply system. In this
case, AVDD, which is the positive analog supply for both the
AD9708 and the op amp, is also used to level-shift the differ-
ential output of the AD9762 to midsupply (i.e., AVDD/2).
AD9708
IOUTA 22
IOUTB 21
COPT
225⍀
225⍀
25⍀
25⍀
500⍀
AD8072
1k⍀
1k⍀
AVDD
Figure 25. Single-Supply DC Differential Coupled Circuit
AD9708 EVALUATION BOARD
General Description
The AD9708-EB is an evaluation board for the AD9708 8-bit
D/A converter. Careful attention to layout and circuit design,
combined with a prototyping area, allows the user to easily and
effectively evaluate the AD9708 in any application where high
resolution, high speed conversion is required.
This board allows the user the flexibility to operate the AD9708
in various configurations. Possible output configurations include
transformer coupled, resistor terminated, inverting/noninverting
and differential amplifier outputs. The digital inputs are
designed to be driven directly from various word generators,
with the on-board option to add a resistor network for proper
load termination. Provisions are also made to operate the
AD9708 with either the internal or external reference, or to
exercise the power-down feature.
Refer to the application note AN-420 “Using the AD9760/
AD9762/AD9764-EB Evaluation Board” for a thorough
description and operating instructions for the AD9708 evalua-
tion board.
REV. B
–11–
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet AD9708.PDF ] | |
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