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PDF AD9630 Data sheet ( Hoja de datos )

Número de pieza AD9630
Descripción Low Distortion 750 MHz Closed-Loop Buffer Amp
Fabricantes Analog Devices 
Logotipo Analog Devices Logotipo



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a
FEATURES
Excellent Gain Accuracy: 0.99 V/V
Wide Bandwidth: 750 MHz
Slew Rate: 1200 V/s
Low Distortion
–65 dBc @ 20 MHz
–80 dBc @ 4.3 MHz
Settling Time
5 ns to 0.1%
8 ns to 0.02%
Low Noise: 2.4 nV/Hz
Improved Source for CLC-110
APPLICATIONS
IF/Communications
Impedance Transformations
Drives Flash ADCs
Line Driving
Low Distortion 750 MHz
Closed-Loop Buffer Amp
AD9630*
PIN CONFIGURATION
+VS 1
** 2
8 OUTPUT
7 NC
NC 3
INPUT 4
6 ***
AD9630 5 –VS
NC = NO CONNECT
**OPTIONAL +VS
***OPTIONAL –VS
NOTE: FOR BEST SETTLING TIME PERFORMANCE USE
OPTIONAL POWER SUPPLIES. ALL SPECIFICATIONS
ARE BASED ON USING SINGLE ؎VS CONNECTIONS,
EXCEPT FOR SETTLING TIME TO 0.02% AND SMALL
SIGNAL S21. CONSULT THE FACTORY FOR VERSIONS
WITH OPTIONAL POWER SUPPLY PINS DISCONNECTED
INTERNAL TO THE PACKAGE.
GENERAL DESCRIPTION
The AD9630 is a monolithic buffer amplifier that utilizes a
patented, innovative, closed-loop design technique to achieve
exceptional gain accuracy, wide bandwidth, and low distortion.
Slew rate limiting has been overcome as indicated by the
1200 V/µs slew rate; this improvement allows the user greater
flexibility in wideband and pulse applications. The second har-
monic distortion terms for an analog input tone of 4.3 MHz
and 20 MHz are –80 dBc and –66 dBc, respectively. Clearly,
the AD9630 establishes a new standard by combining out-
standing dc and dynamic performance in one part.
The large signal bandwidth, low distortion over frequency, and
drive capabilities of the AD9630 make the buffer an ideal flash
ADC driver. The AD9630 provides better signal fidelity than
many of the flash ADCs that it has been designed to drive.
Other applications that require increased current drive at unity
voltage gain (such as cable driving) benefit from the AD9630’s
performance.
The AD9630 is available in plastic DIP (N) and SOIC (R).
*Protected under U.S. patent numbers 5,150,074 and 5,537,079.
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700 World Wide Web Site: http://www.analog.com
Fax: 617/326-8703
© Analog Devices, Inc., 1999

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AD9630 pdf
0
–100
–200
RL = 200
–300
–400
–500
RL = 100
–600
–700
–800
–900
–1000
–3
–2 –1 0 1
VOLTS
23
Figure 4. Endpoint DC Linearity
50
40
30
20
10
0
1M
10M
100M
1G
FREQUENCY – Hz
Figure 7. PSRR vs. Frequency
Typical Performance Curves – AD9630
1M
100k
10k
1k
100
10
1
1M
10M
100M
FREQUENCY – Hz
1G
Figure 5. Input Impedance
30 100
25 80
20 60
|Zo|
15 40
10 20
50
0
1M
10M
100M
1G
FREQUENCY – Hz
Figure 6. Output Impedance
50
50
40
50
TEST
CIRCUIT
30
20
10
0
dc 50 100 150 200 250
FREQUENCY – MHz
Figure 8. 2-Tone Intermodulation
Distortion
10 50
8 40
6 30
4 20
BIAS CURRENT
2 10
00
–2 –10
–4 –20
–6
OFFSET VOLTAGE
–30
–8
–10
–55
25
CASE TEMPERATURE – ؇C
–40
–50
125
Figure 9. Offset Voltage and Bias
Current vs. Temperature
2
VIN = 100mV
1
0
–1 VIN = 750mV
–2
–3 PHASE
–4
VIN = 100mV
–5
–6
GAIN
0
–45
–90
–135
–180
–7
–8
0M
200M 400M 600M 800M
FREQUENCY – Hz
1G
Figure 10 . Forward Gain and Phase
3
2
1 RL = 200
0
–1 RL = 50RL = 100
–2
–3
–4
–5
–6
–7
0
40 80 120 160
FREQUENCY – MHz
200
Figure 11. Frequency Response vs.
RLOAD
0.5
0.25
0
–0.25
–0.5
TEST CIRCUIT
50
50
6pF
2ns/DIVISION
Figure 12. Small-Signal Pulse
Response
REV. B
–5–

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