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PDF AD871 Data sheet ( Hoja de datos )
| Número de pieza | AD871 | |
| Descripción | Complete 12-Bit 5 MSPS Monolithic A/D Converter | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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FEATURES
Monolithic 12-Bit 5 MSPS A/D Converter
Low Noise: 0.17 LSB RMS Referred to Input
No Missing Codes Guaranteed
Differential Nonlinearity Error: 0.5 LSB
Signal-to-Noise and Distortion Ratio: 68 dB
Spurious-Free Dynamic Range: 73 dB
Power Dissipation: 1.03 W
Complete: On-Chip Track-and-Hold Amplifier and
Voltage Reference
Pin Compatible with the AD872
Twos Complement Binary Output Data
Out of Range Indicator
28-Lead Side Brazed Ceramic DIP or 44-Terminal
Surface Mount Package
Complete 12-Bit 5 MSPS
Monolithic A/D Converter
AD871
FUNCTIONAL BLOCK DIAGRAM
AVDD AGND AVSS
DVDD DGND
*DRVDD *DRGND
VINA
VINB
CLOCK
REF IN
REF OUT
AD871
T/H T/H T/H
A/D
A/D
4
D/A
+2.5V
REFERENCE
A/D D/A
A/D
43
CORRECTION LOGIC
D/A
OUTPUT BUFFERS
12
4
REF OUT
*OUTPUT
ENABLE
OTR *MSB MSB–BIT 12
(LSB)
*ONLY AVAILABLE ON 44 -TERMINAL SURFACE MOUNT PACKAGE
PRODUCT DESCRIPTION
The AD871 is a monolithic 12-bit, 5 MSPS analog-to-digital
converter with an on-chip, high performance track-and-hold
amplifier and voltage reference. The AD871 uses a multistage
differential pipelined architecture with error correction logic to
provide 12-bit accuracy at 5 MSPS data rates and guarantees no
missing codes over the full operating temperature range. The
AD871 is a redesigned variation of the AD872 12-bit, 10 MSPS
ADC, optimized for lower noise in applications requiring sam-
pling rates of 5 MSPS or less. The AD871 is pin compatible
with the AD872, allowing the parts to be used interchangeably
as system requirements change.
The low-noise input track-and-hold (T/H) of the AD871 is ide-
ally suited for high-end imaging applications. In addition, the
T/H’s high input impedance and fast settling characteristics
allow the AD871 to easily interface with multiplexed systems
that switch multiple signals through a single A/D converter. The
dynamic performance of the input T/H also renders the AD871
suitable for sampling single channel inputs at frequencies up to
and beyond the Nyquist rate. The AD871 provides both refer-
ence output and reference input pins, allowing the onboard ref-
erence to serve as a system reference. An external reference can
also be chosen to suit the dc accuracy and temperature drift
requirements of the application. A single clock input is used to
control all internal conversion cycles. The digital output data is
presented in twos complement binary output format. An out-of-
range signal indicates an overflow condition, and can be used
with the most significant bit to determine low or high overflow.
The AD871 is fabricated on Analog Devices’ ABCMOS-1 pro-
cess, which uses high speed bipolar and CMOS transistors on a
single chip. High speed, precision analog circuits are now com-
bined with high density logic circuits.
The AD871 is packaged in a 28-lead ceramic DIP and a
44-terminal leadless ceramic surface mount package and is
specified for operation from 0°C to +70°C and –55°C to
+125°C.
PRODUCT HIGHLIGHTS
The AD871 offers a complete single-chip sampling 12-bit,
5 MSPS analog-to-digital conversion function in a 28-lead DIP
or 44-terminal leadless ceramic surface mount package (LCC).
Low Noise—The AD871 features 0.17 LSB referred-to-input
noise, producing essentially a “1 code wide” histogram for a
code-centered dc input.
Low Power—The AD871 at 1.03 W consumes a fraction of the
power of presently available hybrids.
On-Chip Track-and-Hold (T/H)—The low noise, high imped-
ance T/H input eliminates the need for external buffers and can
be configured for single ended or differential inputs.
Ease of Use—The AD871 is complete with T/H and voltage ref-
erence and is pin-compatible with the AD872 (12-bit, 10 MSPS
monolithic ADC).
Out of Range (OTR)—The OTR output bit indicates when the
input signal is beyond the AD871’s input range.
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 1997
1 page  
AD871
PIN FUNCTION DESCRIPTIONS
Symbol
VINA
VINB
AVSS
AVDD
AGND
DGND
DVDD
BIT 12 (LSB)
BIT 2–BIT 11
MSB
OTR
CLK
REF OUT
REF GND
REF IN
BIT 1 (MSB)
DRVDD
DRGND
OEN
NC
DIP LCC
Pin No. Pin No.
1
2
3, 25
4
5, 24
6, 23
7, 22
8
18–9
19
1
2
5, 40
6, 38
9, 36
10
33
16
26–17
29
20 30
21 31
26 41
27 42
28 43
N/A 27
N/A 12, 32
N/A 11, 34
Type
AI
AI
P
P
P
P
P
DO
DO
DO
DO
DI
AO
AI
AI
DO
P
P
N/A 13
DI
N/A 3, 4, 7, 8, 14, 15,
28, 35, 37, 39, 44
Name and Function
(+) Analog Input Signal on the differential input amplifier.
(–) Analog Input Signal on the differential input amplifier.
–5 V Analog Supply.
+5 V Analog Supply.
Analog Ground.
Digital Ground.
+5 V Digital Supply.
Least Significant Bit.
Data Bits 2 through 11.
Inverted Most Significant Bit. Provides twos complement output
data format.
Out of Range is Active HIGH on the leading edge of code 0 or
the trailing edge of code 4096. See Output Data Format Table III.
Clock Input. The AD871 will initiate a conversion on the rising
edge of the clock input. See the Timing Diagram for details.
+2.5 V Reference Output. Tie to REF IN for normal operation.
Reference Ground.
Reference Input. +2.5 V input gives ± 1 V full-scale range.
Most Significant Bit.
+5 V Digital Supply for the output drivers.
Digital Ground for the output drivers.
(See section on Power Supply Decoupling for details on
DRVDD and DRGND.)
Output Enable. See the Three State Output Timing Diagram for details.
No Connect.
TYPE: AI = Analog Input; AO = Analog Output; DI = Digital Input; DO = Digital Output; P = Power; N/A = Not Available on 28-lead DIP, available only on
44-terminal surface mount package.
PIN CONFIGURATIONS
28-Lead Side Brazed Ceramic DIP
44-Terminal LCC
VINA
VINB
AVSS
AVDD
AGND
DGND
DVDD
BIT 12 (LSB)
BIT 11
BIT 10
BIT 9
BIT 8
BIT 7
BIT 6
AD871
TOP VIEW
(Not to Scale)
REF IN
REF GND
REF OUT
AVSS
AGND
DGND
DVDD
CLK
OTR
MSB
BIT 2
BIT 3
BIT 4
BIT 5
6 5 4 3 2 1 44 43 42 41 40
NC 7
NC 8
AGND 9
DGND 10
DRGND 11
DRVDD 12
OEN 13
NC 14
NC 15
BIT 12 (LSB) 16
BIT 11 17
PIN 1
IDENTIFIER
AD871
TOP VIEW
(Not to Scale)
39 NC
38 AVDD
37 NC
36 AGND
35 NC
34 DRGND
33 DVDD
32 DRVDD
31 CLK
30 OTR
29 MSB
18 19 20 21 22 23 24 25 26 27 28
NC = NO CONNECT
REV. A
–5–
5 Page 
AD871
The wide input bandwidth and superior dynamic performance of
the input THA make the AD871 suitable for sampling inputs at
frequencies up to the Nyquist Rate. The input THA is designed
to recover rapidly from input overdrive conditions, returning
from a 50% overdrive in less than 100 ns.
Because of the THA’s exceptionally wide input bandwidth, some
users may find the AD871 is sensitive to noise at frequencies
from 10 MHz to 50 MHz that other converters are incapable of
responding to. This sensitivity can be mitigated by careful use of
the differential inputs (see previous paragraphs). Additionally,
Figure 18 shows how a small capacitor (10 pF – 20 pF for 50 Ω
terminated inputs) may be placed between VINA and VINB to help
reduce high frequency noise in applications where limiting the
input bandwidth is acceptable.
with an rms noise of 28 µV (using an external 1 µF capacitor),
contributes 24 µV (0.05 LSB) of noise to the transfer function
of the AD871.
The full-scale peak-to-peak input voltage is a function of the ref-
erence voltage, according to the equation:
(VINA – VINB) Full Scale = 0.8 × (VREF – REF GND)
Note that the AD871’s performance was optimized for a 2.5 V
reference input: performance may degrade somewhat for other
reference voltages. Figure 20 illustrates the S/(N+D) perfor-
mance vs. reference voltage for a 1 MHz, –0.5 dB input signal.
Note also that if the reference is changed during a conversion,
all three conversions in the pipeline will be invalidated.
70
؎1V
10 OR 20pF
1 VINA
AD871
2 VINB
60
Figure 18. Optional High Frequency Noise Reduction
The AD871 will contribute its own wideband thermal noise. As
a result of the integrated wideband noise (0.17 LSB rms,
referred-to-input), applying a dc analog input may produce more
than one code at the output. A histogram of the ADC output
codes, for a dc input voltage, will be between 1 and 3 codes
wide, depending on how well the input is centered on a given
code and how many samples are taken. Figure 8 shows a typical
AD871 code histogram, and Figure 9 illustrates the AD871’s
transition noise.
REFERENCE INPUT
The nominal reference input should be 2.5 V, taken with respect
to REFERENCE GROUND (REF GND). Figure 19 illustrates
the equivalent model for the reference input: there is no clock or
signal-dependent activity associated with the reference input cir-
cuitry, therefore no “kickback” into the reference.
REF IN 1
AD871
5k⍀
(؎20%)
REF GND 2
AVSS
Figure 19. Equivalent Reference Input Circuit
However, in order to realize the lowest noise performance of the
AD871, care should be taken to minimize noise at the reference
input.
The AD871’s reference input impedance is equal to 5 kΩ (± 20%),
and its effective noise bandwidth is 10 MHz, with a referred-
to-input noise gain of 0.8. For example, the internal reference,
50
1.5
2 2.5 3
REFERENCE INPUT VOLTAGE – Volts
3.5
Figure 20. S/(N+D) vs. Reference Input Voltage,
fIN = 1 MHz, FS = 5 MHz
Table II summarizes various 2.5 V references suitable for use
with the AD871, including the onboard bandgap reference (see
REFERENCE OUTPUT section).
REF-43B
AD680JN
Internal
Table II. Suitable 2.5 V References
Drift (PPM/؇C) Initial Accuracy %
6 (max)
10 (max)
30 (typ)
0.2
0.4
0.4
If an external reference is connected to REF IN, REF OUT
must be connected to +5 V. This should lower the current in
REF GND to less than 350 µA and eliminate the need for a
1 µF capacitor, although decoupling the reference for noise
reduction purposes is recommended.
Alternatively, Figure 21 shows how the AD871 may be driven
from other references by use of an external resistor. The exter-
nal resistor forms a resistor divider with the on-chip 5 kΩ resis-
tor to realize 2.5 V at the reference input pin (REF IN). A trim
potentiometer is needed to accommodate the tolerance of the
AD871’s 5 kΩ resistor.
REV. A
–11–
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet AD871.PDF ] | |
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