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PDF AD842 Data sheet ( Hoja de datos )
| Número de pieza | AD842 | |
| Descripción | High Output Current Fast Settling Op Amp | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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Data Sheet
FEATURES
AC performance
Gain bandwidth product: 80 MHz (gain = 2)
Fast settling: 100 ns to 0.01% for a 10 V step
Slew rate: 375 V/µs
Stable at gains of 2 or greater
Full power bandwidth: 6 MHz for 20 V p-p
DC performance
Input offset voltage: 1.5 mV maximum
Input offset drift: 14 µV/°C
Input voltage noise: 9 nV/√Hz
Open-loop gain: 90 V/mV into a 499 Ω load
Output current: 100 mA minimum
Quiescent supply current: 14 mA maximum
APPLICATIONS
Line drivers
DAC and ADC buffers
Video and pulse amplifiers
MIL-STD-883B parts available, see military data sheet
Wideband, High Output Current
Fast Settling Op Amp
AD842
CONNECTION DIAGRAMS
NIC
NIC
BALANCE
–INPUT
+INPUT
V–
NIC
1 14
AD842
2 TOP VIEW 13
3 12
4 11
5+
10
69
7 (Not to Scale) 8
NIC
BALANCE
NIC
V+
OUTPUT
NIC
NIC
NOTES
1. NIC = NOT INTERNALLY CONNECTED.
Figure 1. PDIP (N-14) and CERDIP (Q-14)
NIC 1 AD842 16 NIC
BALANCE
2
TOP VIEW
(Not to Scale)
15
BALANCE
–INPUT 3
14 +VS
NIC 4
13 NIC
+INPUT 5
NIC 6
+
12 OUTPUT
11 NIC
–VS 7
NIC 8
10 NIC
9 NIC
NOTES
1. NIC = NOT INTERNALLY CONNECTED.
Figure 2. SOIC_W (RW-16)
GENERAL DESCRIPTION
The AD842 is a member of the Analog Devices, Inc. family of
wide bandwidth operational amplifiers. This device is fabricated
using the Analog Device junction isolated complementary
bipolar (CB) process. This process permits a combination of dc
precision and wideband ac performance previously unobtain-
able in a monolithic op amp. In addition to its 80 MHz gain
bandwidth product, the AD842 offers extremely fast settling
characteristics, typically settling to within 0.01% of final value
in less than 100 ns for a 10 V step.
The AD842 also offers a low quiescent current of 13 mA, a high
output current drive capability (100 mA minimum), a low input
voltage noise of 9 nV√Hz, and a low input offset voltage
(1.5 mV maximum).
The 375 V/µs slew rate of the AD842, along with its 80 MHz
gain bandwidth product, ensures excellent performance in
video and pulse amplifier applications. This amplifier is ideally
suited for use in high frequency signal conditioning circuits and
wide bandwidth active filters. The extremely rapid settling time
of the AD842 makes this amplifier the preferred choice for data
acquisition applications requiring 12-bit accuracy. The AD842
is also appropriate for other applications, such as high speed
DAC and ADC buffer amplifiers and other wide bandwidth
circuitry.
PRODUCT HIGHLIGHTS
1. The high slew rate and fast settling time of the AD842
make it ideal for DAC and ADC buffers amplifiers, line
drivers, and all types of video instrumentation circuitry.
2. The AD842 is a precision amplifier. It offers accuracy to
0.01% or better and wide bandwidth, performance
previously available only in hybrids.
3. Laser-wafer trimming reduces the input offset voltage of
1.5 mV maximum, thus eliminating the need for external
offset nulling in many applications.
4. Full differential inputs provide outstanding performance in
all standard high frequency op amp applications where the
circuit gain is 2 or greater.
Rev. F
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevices for itsuse,nor foranyinfringementsofpatentsor other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©1988–2014 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
1 page  
AD842
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter
Supply Voltage
Internal Power Dissipation1
PDIP (N-14), SOIC_W (RW-16)
CERDIP (Q-14)
Input Voltage
Differential Input Voltage
Operating Temperature Range
CERDIP (Q-14, AD842SQ Only)
PDIP (N-14), SOIC_W (RW-16),
CERDIP (Q-14, AD842JQ and
AD842KQ Only)
Storage Temperature Range
CERDIP (Q-14, All Models)
PDIP (N-14), SOIC_W (RW-16)
Junction Temperature
Lead Temperature (Soldering 60 sec)
Rating
±18 V
1.3 W
1.1 W
±VS
±6 V
−55°C to +125°C
0°C to 70°C
−65°C to +150°C
−65°C to +125°C
175°C
300°C
1 Maximum internal power dissipation is specified so that TJ does not exceed
150°C at an ambient temperature of 25°C.
Data Sheet
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL CHARACTERISTICS
Table 3.
Package
14-Lead PDIP
14-Lead CERDIP
16-Lead SOIC_W
ESD CAUTION
θJC θJA
θSA Unit
30 100
°C/W
30 110 38 °C/W
30 100
°C/W
METALIZATION PHOTOGRAPH
BALANCE
–INPUT
0.067
(1.69)
0.106 (2.68)
BALANCE
V+
OUTPUT
+INPUT
Figure 3. Contact Factory for Latest Dimensions,
Dimensions Shown in Inches and (Millimeters)
V–
Rev. F | Page 4 of 16
5 Page 
AD842
Data Sheet
GROUNDING AND BYPASSING
In designing practical circuits with the AD842, the user must
take some special precautions whenever high frequencies are
involved.
100%
90%
5mV
2µs
OUTPUT:
5V/DIV
OUTPUT
ERROR:
0.01%/DIV
10%
0%
Figure 31. AD842 Settling Demonstrating No Settling Tails
Circuits must be built with short interconnect leads. Use large
ground planes whenever possible to provide a low resistance,
low inductance circuit path; this also minimizes the effects of
high frequency coupling. Avoid sockets because the increased
interlead capacitance can degrade bandwidth.
Use feedback resistors of low enough value to ensure that the
time constant formed with the circuit capacitances does not
limit the amplifier performance. Resistor values of less than
5 kΩ are recommended. If a larger resistor must be used, a
small (<10 pF) feedback capacitor connected in parallel with
the feedback resistor, RF, can be used to compensate for these
stray capacitances and to optimize the dynamic performance of
the amplifier in the particular application.
Bypass power supply leads to ground as close as possible to the
amplifier pins. A 2.2 μF capacitor in parallel with a 0.1 μF
ceramic disk capacitor is recommended.
CAPACITIVE LOAD DRIVING ABILITY
Like all wideband amplifiers, the AD842 is sensitive to
capacitive loading. The AD842 is designed to drive capacitive
loads of up to 20 pF without degradation of its rated
performance. Capacitive loads of greater than 20 pF decrease
0.1µF
+VS
2.2µF
VIN
TERMINATION
RESISTOR FOR
INPUT SIGNAL
11
5
AD842
4
6
10
0.1µF
2.2µF
–VS
the dynamic performance of the device, although instability
does not occur unless the load exceeds 100 pF.
USING A HEAT SINK
The AD842 draws less quiescent power than most precision
high speed amplifiers and is specified for operation without a
heat sink. However, when driving low impedance loads, the
current to the load can be 10 times the quiescent current. This
creates a noticeable temperature rise. Use of a small heat sink
improves performance.
TERMINATED LINE DRIVER
The AD842 is optimized for high speed line driver applications.
Figure 32 shows the AD842 driving a doubly terminated cable
in a gain-of-2 follower configuration. The AD842 maintains a
typical slew rate of 375 V/μs, which means it can drive a ±10 V,
6.0 MHz signal, or a ±3 V, 19.9 MHz signal.
The termination resistor, RT, minimizes reflections from the far
end of the cable when equal to the characteristic impedance of
the cable. A back-termination resistor (RBT, also equal to the
characteristic impedance of the cable) can be placed between
the AD842 output and the cable to damp any stray signals
caused by a mismatch between RT and the characteristic
impedance of the cable. This configuration results in a cleaner
signal. With this circuit, the voltage on the line equals VIN
because one half of VOUT is dropped across RBT.
The AD842 has a 100 mA minimum output current and,
therefore, can drive ±5 V into a 50 Ω cable.
Choose the feedback resistors, R1 and R2, carefully. Large value
resistors are desirable to limit the amount of current drawn
from the amplifier output. Large resistors can cause amplifier
instability because the parallel resistance of R1||R2 combines
with the input capacitance (typically 2 pF to 5 pF) to create an
additional pole. The voltage noise of the AD842 is equivalent to
a 5 kΩ resistor; these large resistors can significantly increase
the system noise. Resistor values of 1 kΩ or 2 kΩ are
recommended.
If termination is not used, cables appear as capacitive loads and
can be decoupled from the AD842 by a resistor in series with
the output.
50Ω OR 75Ω
RBT CABLE
RT
R1
R2
RT = RBT = CABLE
CHARACTERISTIC IMPEDANCE
Figure 32. Line Driver Configuration (PDIP)
Rev. F | Page 10 of 16
11 Page | ||
| Páginas | Total 17 Páginas | |
| PDF Descargar | [ Datasheet AD842.PDF ] | |
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