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PDF AD835 Data sheet ( Hoja de datos )
| Número de pieza | AD835 | |
| Descripción | 4-Quadrant Multiplier | |
| Fabricantes | Analog Devices | |
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Data Sheet
FEATURES
Simple: basic function is W = XY + Z
Complete: minimal external components required
Very fast: Settles to 0.1% of full scale (FS) in 20 ns
DC-coupled voltage output simplifies use
High differential input impedance X, Y, and Z inputs
Low multiplier noise: 50 nV/√Hz
APPLICATIONS
Very fast multiplication, division, squaring
Wideband modulation and demodulation
Phase detection and measurement
Sinusoidal frequency doubling
Video gain control and keying
Voltage-controlled amplifiers and filters
GENERAL DESCRIPTION
The AD835 is a complete four-quadrant, voltage output analog
multiplier, fabricated on an advanced dielectrically isolated
complementary bipolar process. It generates the linear product
of its X and Y voltage inputs with a −3 dB output bandwidth of
250 MHz (a small signal rise time of 1 ns). Full-scale (−1 V to
+1 V) rise to fall times are 2.5 ns (with a standard RL of 150 Ω),
and the settling time to 0.1% under the same conditions is
typically 20 ns.
Its differential multiplication inputs (X, Y) and its summing
input (Z) are at high impedance. The low impedance output
voltage (W) can provide up to ±2.5 V and drive loads as low as
25 Ω. Normal operation is from ±5 V supplies.
Though providing state-of-the-art speed, the AD835 is simple
to use and versatile. For example, as well as permitting the
addition of a signal at the output, the Z input provides the
means to operate the AD835 with voltage gains up to about ×10.
In this capacity, the very low product noise of this multiplier
(50 nV/√Hz) makes it much more useful than earlier products.
The AD835 is available in an 8-lead PDIP package (N) and an
8-lead SOIC package (R) and is specified to operate over the
−40°C to +85°C industrial temperature range.
250 MHz, Voltage Output,
4-Quadrant Multiplier
AD835
FUNCTIONAL BLOCK DIAGRAM
X1
X = X1 – X2
AD835
X2
XY XY + Z
+ X1
+
W OUTPUT
Y1
Y2 Y = Y1 – Y2
Z INPUT
Figure 1.
PRODUCT HIGHLIGHTS
1. The AD835 is the first monolithic 250 MHz, four-quadrant
voltage output multiplier.
2. Minimal external components are required to apply the
AD835 to a variety of signal processing applications.
3. High input impedances (100 kΩ||2 pF) make signal source
loading negligible.
4. High output current capability allows low impedance loads
to be driven.
5. State-of-the-art noise levels achieved through careful
device optimization and the use of a special low noise,
band gap voltage reference.
6. Designed to be easy to use and cost effective in applications
that require the use of hybrid or board-level solutions.
Rev. E
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevices for itsuse,nor foranyinfringementsofpatentsor other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©1994–2014 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
1 page  
AD835
Parameter
OUTPUT CHARACTERISTICS
Voltage Swing
vs. Temperature
Voltage Noise Spectral Density
Offset Voltage
vs. Temperature3
Short-Circuit Current
Scale Factor Error
vs. Temperature
Linearity (Relative Error)4
vs. Temperature
POWER SUPPLIES
Supply Voltage
For Specified Performance
Quiescent Supply Current
vs. Temperature
PSRR at Output vs. VP
PSRR at Output vs. VN
Conditions
TMIN to TMAX2
X = Y = 0 V, f < 10 MHz
TMIN to TMAX2
TMIN to TMAX2
TMIN to TMAX2
TMIN to TMAX2
+4.5 V to +5.5 V
−4.5 V to −5.5 V
Min Typ
±2.2 ±2.5
±2.0
50
±25
75
±5
±0.5
±4.5 ±5
16
1 All minimum and maximum specifications are guaranteed. These specifications are tested on all production units at final electrical test.
2 TMIN = −40°C, TMAX = 85°C.
3 Normalized to zero at 25°C.
4 Linearity is defined as residual error after compensating for input offset, output voltage offset, and scale factor errors.
Data Sheet
Max
±751
±10
±81
±9
±1.01
±1.25
Unit
V
V
nV/√Hz
mV
mV
mA
% FS
% FS
% FS
% FS
±5.5 V
251 mA
26 mA
0.51 %/V
0.5 %/V
Rev. E | Page 4 of 14
5 Page 
AD835
THEORY OF OPERATION
The AD835 is a four-quadrant, voltage output analog multiplier,
fabricated on an advanced dielectrically isolated complementary
bipolar process. In its basic mode, it provides the linear product
of its X and Y voltage inputs. In this mode, the −3 dB output
voltage bandwidth is 250 MHz (with small signal rise time of 1 ns).
Full-scale (−1 V to +1 V) rise to fall times are 2.5 ns (with a
standard RL of 150 Ω), and the settling time to 0.1% under the
same conditions is typically 20 ns.
As in earlier multipliers from Analog Devices a unique
summing feature is provided at the Z input. As well as providing
independent ground references for the input and the output and
enhanced versatility, this feature allows the AD835 to operate
with voltage gain. Its X-, Y-, and Z-input voltages are all
nominally ±1 V FS, with an overrange of at least 20%. The
inputs are fully differential at high impedance (100 kΩ||2 pF)
and provide a 70 dB CMRR (f ≤ 1 MHz).
The low impedance output is capable of driving loads as small
as 25 Ω. The peak output can be as large as ±2.2 V minimum
for RL = 150 Ω, or ±2.0 V minimum into RL = 50 Ω. The AD835
has much lower noise than the AD534 or AD734, making it
attractive in low level, signal processing applications, for
example, as a wideband gain control element or modulator.
BASIC THEORY
The multiplier is based on a classic form, having a translinear core,
supported by three (X, Y, and Z) linearized voltage-to-current
converters, and the load driving output amplifier. The scaling
voltage (the denominator U in the equations) is provided by a
band gap reference of novel design, optimized for ultralow noise.
Figure 19 shows the functional block diagram.
In general terms, the AD835 provides the function
W
=
(
X1
−
X2)(Y1
U
−
Y
2)
+
Z
(1)
where the variables W, U, X, Y, and Z are all voltages. Connected as
a simple multiplier, with X = X1 − X2, Y = Y1 − Y2, and Z = 0
and with a scale factor adjustment (see Figure 19) that sets U = 1 V,
the output can be expressed as
W = XY
(2)
X1
X = X1 – X2
AD835
X2
XY XY + Z
+ X1
W OUTPUT
+
Y1
Y2 Y = Y1 – Y2
Z INPUT
Figure 19. Functional Block Diagram
Simplified representations of this sort, where all signals are
presumed expressed in V, are used throughout this data sheet to
Data Sheet
avoid the needless use of less intuitive subscripted variables
(such as, VX1). All variables as being normalized to 1 V.
For example, the input X can either be stated as being in the −1 V
to +1 V range or simply –1 to +1. The latter representation is found
to facilitate the development of new functions using the AD835.
The explicit inclusion of the denominator, U, is also less helpful, as
in the case of the AD835, if it is not an electrical input variable.
SCALING ADJUSTMENT
The basic value of U in Equation 1 is nominally 1.05 V. Figure 20,
which shows the basic multiplier connections, also shows how
the effective value of U can be adjusted to have any lower
voltage (usually 1 V) through the use of a resistive divider
between W (Pin 5) and Z (Pin 4). Using the general resistor
values shown, Equation 1can be rewritten as
W
=
XY
U
+
kW
+
(1 −
k )Z '
(3)
where Z' is distinguished from the signal Z at Pin 4. It follows that
W
=
XY
(1 − k)U
+
Z'
(4)
In this way, the effective value of U can be modified to
U’ = (1 − k)U
(5)
without altering the scaling of the Z' input, which is expected because
the only ground reference for the output is through the Z' input.
Therefore, to set U' to 1 V, remembering that the basic value of
U is 1.05 V, R1 must have a nominal value of 20 × R2. The values
shown allow U to be adjusted through the nominal range of
0.95 V to 1.05 V. That is, R2 provides a 5% gain adjustment.
In many applications, the exact gain of the multiplier may not
be very important; in which case, this network may be omitted
entirely, or R2 fixed at 100 Ω.
FB 4.7µF TANTALUM
+5V +
0.01µF CERAMIC
X
8765
X1 X2 VP W
AD835
Y1 Y2 VN
123
Z
4
Y
+5V
FB
+
4.7µF TANTALUM
0.01µF CERAMIC
W
R1 = (1–k) R
2kΩ
R2 = kR
200Ω
Z’
Figure 20. Multiplier Connections
Rev. E | Page 10 of 14
11 Page | ||
| Páginas | Total 15 Páginas | |
| PDF Descargar | [ Datasheet AD835.PDF ] | |
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