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PDF AD8313 Data sheet ( Hoja de datos )

Número de pieza AD8313
Descripción Logarithmic Detector/Controller
Fabricantes Analog Devices 
Logotipo Analog Devices Logotipo



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Data Sheet
0.1 GHz to 2.5 GHz 70 dB
Logarithmic Detector/Controller
AD8313
FEATURES
Wide bandwidth: 0.1 GHz to 2.5 GHz min
High dynamic range: 70 dB to ±3.0 dB
High accuracy: ±1.0 dB over 65 dB range (@ 1.9 GHz)
Fast response: 40 ns full-scale typical
Controller mode with error output
Scaling stable over supply and temperature
Wide supply range: 2.7 V to 5.5 V
Low power: 40 mW at 3 V
Power-down feature: 60 mW at 3 V
Complete and easy to use
APPLICATIONS
RF transmitter power amplifier setpoint control and level
monitoring
Logarithmic amplifier for RSSI measurement cellular base
stations, radio link, radar
GENERAL DESCRIPTION
The AD8313 is a complete multistage demodulating logarithmic
amplifier that can accurately convert an RF signal at its input to
an equivalent decibel-scaled value at its dc output. The AD8313
maintains a high degree of log conformance for signal frequencies
from 0.1 GHz to 2.5 GHz. Application is straightforward,
requiring only a single supply of 2.7 V to 5.5 V and the addition
of a suitable input and supply decoupling. Operating on a 3 V
supply, its 13.7 mA consumption (for TA = 25°C) is only 41 mW.
A power-down feature is provided; the input is taken high to
initiate a low current (20 µA) sleep mode, with a threshold at
half the supply voltage.
The AD8313 is fabricated on Analog Devices, Inc., advanced
25 GHz silicon bipolar IC process and is available in an 8-lead
MSOP package. The operating temperature range is −40°C to
+85°C.
VPOS 1
INHI 2
INLO 3
VPOS 4
FUNCTIONAL BLOCK DIAGRAM
NINE DETECTOR CELLS
+ ++
+
+ IV
8 VOUT
8dB 8dB
8dB
CINT
8dB LP VI
EIGHT 8dB 3.5GHz AMPLIFIER STAGES
AD8313
INTERCEPT
CONTROL
7 VSET
6 COMM
SLOPE
CONTROL
BAND GAP
REFERENCE
GAIN
BIAS
5 PWDN
Figure 1.
Table 1. Next Generation Upgrades for AD8313
Part Number Comments
ADL5513
Improved range and temperature stability,
operation up to 4 GHz
AD8318
Improved temperature stability, operation up
to 8 GHz
AD8317
Lower input range, improved temperature
stability, operation up to 10 GHz
AD8319
Lower input range, improved temperature
stability, operation up to 10 GHz
2.0
FREQUENCY = 1.9GHz
1.8
5
4
1.6 3
1.4 2
1.2 1
1.0 0
0.8 –1
0.6 –2
0.4 –3
0.2 –4
0
–80 –70 –60 –50 –40 –30 –20 –10
–5
0
INPUT AMPLITUDE (dBm)
Figure 2. Typical Logarithmic Response and Error vs. Input Amplitude
Rev. E
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevices for itsuse,nor foranyinfringementsofpatentsor other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©1998–2015 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com

1 page




AD8313 pdf
AD8313
Parameter
2.5 GHz7
±3 dB Dynamic Range
Range Center
±1 dB Dynamic Range
Slope
Intercept
±3 dB Dynamic Range
Range Center
±1 dB Dynamic Range
Slope
Intercept
Temperature Sensitivity
3.5 GHz5
±3 dB Dynamic Range
±1 dB Dynamic Range
Slope
Intercept
CONTROL MODE
Controller Sensitivity
Low Frequency Gain
Open-Loop Corner Frequency
Open-Loop Slew Rate
VSET Delay Time
VOUT INTERFACE
Current Drive Capability
Source Current
Sink Current
Minimum Output Voltage
Maximum Output Voltage
Output Noise Spectral Density
Small Signal Response Time
Large Signal Response Time
VSET INTERFACE
Input Voltage Range
Input Impedance
POWER-DOWN INTERFACE
PWDN Threshold
Power-Up Response Time
PWDN Input Bias Current
Test Conditions/Comments
Nominal conditions
2.7 V ≤ VS ≤ 5.5 V, –40°C ≤ T ≤ +85°C
PIN =–10 dBm
Nominal conditions
f = 900 MHz
VSET to VOUT8
VSET to VOUT8
f = 900 MHz
Open-loop
Open-loop
PIN = –60 dBm, fSPOT = 100 Hz
PIN = –60 dBm, fSPOT = 10 MHz
PIN = –60 dBm to –57 dBm, 10% to 90%
PIN = No signal to 0 dBm; settled to 0.5 dB
Time delay following high to low transition
until device meets full specifications.
PWDN = 0 V
PWDN = VS
Min2
48
16
–111
47
14.5
–128
0
Typ
66
–34
46
20
–92
68
–34.5
46
20
–92
–0.040
43
35
24
–65
23
84
700
2.5
150
Data Sheet
Max2
25
–72
25
–56
Unit
dB
dBm
dB
mV/dB
dBm
dB
dBm
dB
mV/dB
dBm
dB/°C
dB
dB
mV/dB
dBm
V/dB
dB
Hz
V/µs
ns
400
10
50
VPOS – 0.1
2.0
1.3
40
110
18||1
VPOS/2
1.8
5
<1
60
160
VPOS
µA
mA
mV
V
µV/√Hz
µV/√Hz
ns
ns
V
kΩ||pF4
V
µs
µA
µA
Rev. E | Page 4 of 24

5 Page





AD8313 arduino
AD8313
100.00
10.00
13.7mA
1.00
VPOS = +3V
VPOS = +5V
0.10
0.01
0
20µA
40µA
1 234
PWDN VOLTAGE (V)
5
Figure 16. Typical Supply Current vs. PWDN Voltage
CH. 1 AND CH. 2: 1V/DIV
CH. 3: 5V/DIV
CH. 1 GND
VOUT @
VS = +5.5V
CH. 2 GND
VOUT @
VS = +2.7V
CH. 3 GND
HORIZONTAL: 1µs/DIV
PWDN
Figure 17. PWDN Response Time
HP8648B 10MHz REF OUTPUT
SIGNAL
GENERATOR
RF OUT
PIN = 0dBm
10
+VS
0.01µF
0.01µF
1 VPOS VOUT 8
0.1µF
AD8313
2 INHI VSET 7
54.9
3 INLO COMM 6
10
+VS
4 VPOS PWDN 5
0.1µF
EXT TRIG
HP8112A
PULSE
OUT
GENERATOR
TEK P6205
FET PROBE
TEK
TDS784C
SCOPE TRIG
0603 SIZE SURFACE
MOUNT COMPONENTS ON
A LOW LEAKAGE PC BOARD
Figure 20. Test Setup for PWDN Response Time
Data Sheet
CH. 1 AND CH. 2: 200mV/DIV
CH. 1
CH. 2
CH. 1 GND
CH. 2 GND
AVERAGE: 50 SAMPLES
VS = +5.5V
VS = +2.7V
PULSED RF
100MHz, –45dBm
HORIZONTAL: 50ns/DIV
Figure 18. Response Time, No Signal to –45 dBm
CH. 1 & CH. 2: 500mV/DIV
AVERAGE: 50 SAMPLES
CH. 1
CH. 2
CH. 1 GND
CH. 2 GND
VS = +5.5V
VS = +2.7V
PULSED RF
100MHz, 0dBm
HORIZONTAL: 50ns/DIV
Figure 19. Response Time, No Signal to 0 dBm
HP8648B
SIGNAL
GENERATOR
PULSE
MODULATION
MODE
10MHz REF OUTPUT
PULSE MODE IN
RF OUT
EXT TRIG
OUT
HP8112A
PULSE
GENERATOR
TRIG
OUT
RF –6dB
SPLITTER
–6dB
10
+VS
0.01µF
1 VPOS VOUT 8
0.1µF
AD8313
2 INHI VSET 7
0.01µF
54.9
3 INLO COMM 6
10
+VS
4 VPOS PWDN 5
0.1µF
TEK P6205
FET PROBE
TEK
TDS784C
SCOPE TRIG
0603 SIZE SURFACE
MOUNT COMPONENTS ON
A LOW LEAKAGE PC BOARD
Figure 21. Test Setup for RSSI Mode Pulse Response
Rev. E | Page 10 of 24

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