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PDF ADS902 Data sheet ( Hoja de datos )
| Número de pieza | ADS902 | |
| Descripción | 10-Bit/ 30MHz Sampling ANALOG-TO-DIGITAL CONVERTER | |
| Fabricantes | Burr-Brown Corporation | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de ADS902 (archivo pdf) en la parte inferior de esta página. Total 11 Páginas | ||
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®
ADS902E
ADS902
TM 10-Bit, 30MHz Sampling
ANALOG-TO-DIGITAL CONVERTER
FEATURES
q HIGH SNR: 57dB
q EXTERNAL REFERENCE
q LOW POWER: 140mW
q ADJUSTABLE FULL SCALE RANGE
q POWER DOWN
q 28-PIN SSOP PACKAGE
APPLICATIONS
q BATTERY POWERED EQUIPMENT
q CAMCORDERS
q PORTABLE TEST EQUIPMENT
q COMPUTER SCANNERS
q COMMUNICATIONS
ADS902
DESCRIPTION
The ADS902 is a high speed pipelined analog-to-
digital converter that is specified to operate from a
single +5V supply. This converter includes a wide
bandwidth track/hold and a 10-bit quantizer. The per-
formance is specified with a single-ended input range
of 2.25V to 3.25V, or 2V to 4V. The input range is set
by the external reference values.
The ADS902 employs digital error correction tech-
niques to provide excellent differential linearity for
demanding imaging applications. Its low distortion
and high SNR give the extra margin needed for tele-
communications, video and test instrumentation appli-
cations. This high performance A/D converter is speci-
fied to operate at a 30MHz sampling rate. The ADS902
is available in a 28-pin SSOP package.
CLK
Timing
Circuitry
LVDD
IN T/H
Pipeline
A/D
Error
Correction
Logic
3-State
Outputs
10-Bit
Digital
Data
Reference
Ladder
REFT CM REFB
Pwrdn OE
International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 • Twx: 910-952-1111
Internet: http://www.burr-brown.com/ • FAXLine: (800) 548-6133 (US/Canada Only) • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132
©1996 Burr-Brown Corporation
PDS-11359B
ADS902Printed in U.S.A., February, 1997
®
1 page  
TYPICAL PERFORMANCE CURVES
At TA = +25°C, VS = LVDD = +5V, REFB = +2.25V, REFT = +3.25V, and Sampling Rate = 30MHz, unless otherwise specified.
0
–20
–40
–60
–80
–100
0
SPECTRAL PERFORMANCE
fIN = 12.5MHz
VIN = 1Vp-p
2.5 5.0 7.5 10.0 12.5 15.0
Frequency (MHz)
0
–20
–40
–60
–80
–100
–120
0
SPECTRAL PERFORMANCE
fIN = 12.5MHz
2Vp-p
2.5 5.0 7.5 10.0 12.5 15.0
Frequency (MHz)
0
–20
–40
–60
–80
–100
–120
0
UNDERSAMPLING
fIN = 40MHz
fS = 28MHz
VIN = 1Vp-p
2.8 5.6 8.4 11.2 14.0
Frequency (MHz)
2
1
0
–1
–2
0
DIFFERENTIAL LINEARITY ERROR
fIN = 12.5MHz
VIN = 1Vp-p
256 512 768
Output Code
1024
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
0
FREQUENCY SPECTRUM
f1 = 3.5MHz at –7dB
f2 = 3.6MHz at –7dB
2f1 – f2 = 69.5dBFS
2f2 – f1 = 68.4dBFS
2.50
5.00 7.50
Frequency (MHz)
10.00
2
1
0
–1
–2
0
DIFFERENTIAL LINEARITY ERROR
fIN = 12.5MHz
2Vp-p
256 512 768
Output Code
1024
®
5 ADS902
5 Page 
POWER-DOWN MODE
The ADS902’s low power consumption can be reduced even
further by initiating a power-down mode. To do so, the
Pwrdn-Pin (Pin 17) must be tied to a logic “High” reducing
the current drawn from the supply by about 88%. In normal
operation the power-down mode is disabled by an internal
pull-down resistor (50kΩ).
During power-down, the digital outputs are set into the high-
impedance condition (3-state). With the clock applied, the
converter does not accurately process the sampled signal.
After removing the power-down condition the output data
from the following 5 clock cycles is invalid (data latency).
DECOUPLING AND GROUNDING
CONSIDERATIONS
The ADS902 converter has several supply pins, one of
which is dedicated to supply only the output driver. The
remaining supply pins are not, as is often the case, divided
into analog and digital supply pins since they are internally
connected on the chip. For this reason it is recommended to
treat the converter as an analog component and to power it
from the analog supply only. Digital supply lines often carry
high levels of noise which can couple back into the converter
and limit the achievable performance.
Because of the pipeline architecture, the converter also
generates high frequency transients and noise that are fed
back into the supply and reference lines. This requires that
the supply and reference pins be sufficiently bypassed.
Figure 9 shows the recommended decoupling scheme for the
analog supplies. In most cases 0.1µF ceramic chip capacitors
are adequate to keep the impedance low over a wide fre-
quency range. Their effectiveness largely depends on the
proximity to the individual supply pin. Therefore, they
should be located as close to the supply pins as possible.
ADS902
+VS GND
1 13 14
+VS
18
GND
19 20
+VS
28
0.1µF
0.1µF
0.1µF
FIGURE 9. Recommended Bypassing for Analog Supply
Pins.
®
11 ADS902
11 Page | ||
| Páginas | Total 11 Páginas | |
| PDF Descargar | [ Datasheet ADS902.PDF ] | |
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